hyb18t512160b2fl-5 Qimonda, hyb18t512160b2fl-5 Datasheet - Page 33

• Manufacturer Part Number: hyb18t512160b2fl-5
• Description: 512-mbit Double-data-rate-two Sdram
• Manufacturer: Qimonda

5.4
This chapter describes the Output Buffer Characteristics.
1)
2) The values of
3)
1) SSTL_18 test load for
Rev. 1.40, 2008-03
10062006-YPTZ-CDR7
Symbol
I
I
Symbol
V
V
V
OH
OL
OH
OL
OTR
V
plus a noise margin and
shifting the desired driver operating points along 21 Ohm load line to define a convenient current for measurement.
V
to the 25 Ohm termination resistor into
Ohm termination resistor (13.4 mA × 25 Ohm = 335 mV). With an additional series resistor of 20 Ohm this translates into a minimum
requirement of 603 mV swing relative to
DDQ
DDQ
= 1.7 V;
= 1.7 V;
Parameter
Minimum Required Output Pull-up
Maximum Required Output Pull-down
Output Timing Measurement Reference Level
I
V
V
Parameter
Output Minimum Source DC Current
Output Minimum Sink DC Current
OH(dc)
OUT
OUT
= 1.42 V. (
= 280 mV.
Output Buffer Characteristics
and
V
OH
I
V
OL(dc)
IL.MAX
and
V
are based on the conditions given in
V
V
OUT
minus a noise margin are delivered to an SSTL_18 receiver. The actual current values are derived by
OUT
OL
–
is different from the referenced load . The SSTL_18 test load has a 20 Ohm series resistor additionally
V
/
I
DDQ
OL
V
TT
must be less than 21 Ohm for values of
V
) /
TT
. The SSTL_18 definition assumes that
I
, at the ouput device (13.4 mA × 45 Ohm = 603 mV).
OH
must be less than 21 Ω for values of
33
1)
and
–13.4
13.4
SSTL_18
3)
. They are used to test drive current capability to ensure
V
±
OUT
335 mV must be developed across the effectively 25
V
512-Mbit Double-Data-Rate-Two SDRAM
SSTL_18
V
V
0.5 ×
OUT
between 0 V and 280 mV.
TT
TT
SSTL_18 Output AC Test Conditions
between
SSTL_18 Output DC Current Drive
+ 0.603
– 0.603
HY[B/I]18T512[40/80/16]0B2[C/F](L)
V
DDQ
V
Unit
mA
mA
DDQ
and
V
DDQ
Internet Data Sheet
Unit
V
V
V
– 280 mV.
TABLE 27
TABLE 28
Notes
1)2)
2)3)
Note
1)
1)
V
IH.MIN
.