lh28f400su-nc Sharp Microelectronics of the Americas, lh28f400su-nc Datasheet - Page 6
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lh28f400su-nc
Manufacturer Part Number
lh28f400su-nc
Description
512k 256k Flash Memory
Manufacturer
Sharp Microelectronics of the Americas
Datasheet
1.LH28F400SU-NC.pdf
(35 pages)
LH28F400SU-NC
Status Register (CSR) which is 100% compatible with
the LH28F008SA Flash memory’s Status Register. This
register, when used alone, provides a straightforward
upgrade capability to the LH28F004SUT-NC from a
LH28F008SA-based design.
RY
tie many RY
figuration such as a Resident Flash Array.
access time of 60 ns (t
5.25 V), and 70 ns (t
over the commercial temperature range (0 to +70°C).
Power Saving (APS) feature which substantially reduces
the active current when the device is in static mode of
operation (addresses not switching).
when the RP
transitions low, any current operation is aborted and the
device is put into the deep power down mode. This mode
brings the device power consumption to less than 5 µA
and provides additional write protection by acting as a
device reset pin during power transitions. When the
power is turned on, RP
return the device to default configuration. When the
power transition is occured, or at the power on/off RP
pin is required to stay low in order to protect data from
noise. A recovery time of 480 ns is required from RP
switching high until outputs are again valid. In the Deep
Power-Down State, the WSM is reset (any current
operation will abort) and the CSR register is cleared.
CE
control pins at CMOS levels. In this mode, the device
draws an I
6
The LH28F400SU-NC contains a Compatible
The LH28F400SU-NC incorporates an open drain
The LH28F400SU-NC is specified for a maximum
The LH28F400SU-NC incorporates an Automatic
In APS mode, the typical I
A Deep Power-Down mode of operation is invoked
A CMOS Standby mode of operation is enabled when
»
»
/ BY
transitions high and RP
»
output pin. This feature allows the user to OR-
CC
»
/ BY
»
standby current of 10 µA.
(called PWD on the LH28F008SA) pin
»
pins together in a multiple memory con-
ACC
»
ACC
) at 5 V operation (4.5 to 5.5 V)
pin is turned to low in order to
) at 5 V operation (4.75 to
CC
»
stays high with all input
Current is 2 mA at 5 V.
»
»
MEMORY MAP
NOTE:
In Byte-wide (x8) mode A
In Word-wide (x16) mode A
are ignored A
7BFFFH
6BFFFH
5BFFFH
4BFFFH
3BFFFH
2BFFFH
1BFFFH
0BFFFH
7FFFFH
7C000H
77FFFH
73FFFH
6FFFFH
6C000H
67FFFH
63FFFH
5FFFFH
5C000H
57FFFH
53FFFH
4FFFFH
4C000H
47FFFH
43FFFH
3FFFFH
3C000H
37FFFH
33FFFH
2FFFFH
2C000H
27FFFH
23FFFH
1FFFFH
1C000H
17FFFH
13FFFH
0FFFFH
0C000H
07FFFH
03FFFH
78000H
74000H
70000H
68000H
64000H
60000H
58000H
54000H
50000H
48000H
44000H
40000H
38000H
34000H
30000H
28000H
24000H
20000H
18000H
14000H
10000H
08000H
04000H
00000H
4M (512K × 8, 256K × 16) Flash Memory
1
.
Figure 5. Memory Map
1
is the lowest order address.
1
16KB BLOCK
16KB BLOCK
don't care, address values
16KB BLOCK
16KB BLOCK
16KB BLOCK
16KB BLOCK
16KB BLOCK
16KB BLOCK
16KB BLOCK
16KB BLOCK
16KB BLOCK
16KB BLOCK
16KB BLOCK
16KB BLOCK
16KB BLOCK
16KB BLOCK
16KB BLOCK
16KB BLOCK
16KB BLOCK
16KB BLOCK
16KB BLOCK
16KB BLOCK
16KB BLOCK
16KB BLOCK
16KB BLOCK
16KB BLOCK
16KB BLOCK
16KB BLOCK
16KB BLOCK
16KB BLOCK
16KB BLOCK
16KB BLOCK
28F400SUT-NC60-3
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0
1