m48z35y STMicroelectronics, m48z35y Datasheet - Page 11

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m48z35y

Manufacturer Part Number
m48z35y
Description
256 Kbit 32kb X8 Zeropower Sram
Manufacturer
STMicroelectronics
Datasheet

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2.3
Note:
Table 4.
1. Valid for ambient operating temperature: T
2. C
3. If E goes low simultaneously with W going low, the outputs remain in the high impedance state.
Data retention mode
With valid V
RAM. Should the supply voltage decay, the RAM will automatically power-fail deselect, write
protecting itself when V
become high impedance, and all inputs are treated as “don't care.”
A power failure during a WRITE cycle may corrupt data at the currently addressed location,
but does not jeopardize the rest of the RAM's content. At voltages below V
user can be assured the memory will be in a write protected state, provided the V
is not less than t
into the deselect window during the time the device is sampling V
of the power supply lines is recommended.
When V
preserves data. The internal button cell will maintain data in the M48Z35/Y for an
accumulated period of at least 10 years (at 25°C) when V
As system power returns and V
power supply is switched to external V
V
V
PFD
PFD
t
t
WHQX
WLQZ
Symbol
noted).
t
t
t
t
t
t
t
t
t
t
t
t
t
WLWH
WHDX
WHAX
DVWH
AVWH
L
AVWL
EHDX
ELEH
EHAX
DVEH
AVEH
AVAV
AVEL
(min) plus t
(max).
= 5pF (see
(2)(3)
(2)(3)
CC
drops below V
CC
Write mode AC characteristics
WRITE cycle time
Address valid to WRITE enable low
Address valid to chip enable low
WRITE enable pulse width
Chip enable low to chip enable high
WRITE enable high to address transition
Chip enable high to address transition
Input valid to WRITE enable high
Input valid to chip enable high
WRITE enable high to input transition
Chip enable high to input transition
WRITE enable low to output Hi-Z
Address valid to WRITE enable high
Address valid to chip enable high
WRITE enable high to output transition
Figure 10 on page
applied, the M48Z35/Y operates as a conventional BYTEWIDE™ static
REC
F
. The M48Z35/Y may respond to transient noise spikes on V
(min). Normal RAM operation can resume t
CC
SO
falls within the V
, the control circuit switches power to the internal battery which
15).
CC
Parameter
rises above V
A
CC
= 0 to 70°C; V
. Write protection continues until V
(1)
PFD
(max), V
SO
CC
, the battery is disconnected, and the
= 4.75 to 5.5V or 4.5 to 5.5V (except where
PFD
CC
(min) window. All outputs
is less than V
REC
CC
Min
70
50
55
30
30
60
60
. Therefore, decoupling
after V
0
0
0
0
5
5
5
M48Z35/Y
–70
SO
PFD
CC
CC
Max
.
CC
25
exceeds
(min), the
reaches
CC
that reach
fall time
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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