m36w832te STMicroelectronics, m36w832te Datasheet - Page 11

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m36w832te

Manufacturer Part Number
m36w832te
Description
32 Mbit 2mb X16, Boot Block Flash Memory And 8 Mbit 512kb X16 Sram, Multiple Memory Product
Manufacturer
STMicroelectronics
Datasheet

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Flash Memory Component
The Flash Memory is a 32 Mbit (2 Mbit x 16) device
that can be erased electrically at block level and
programmed in-system on a Word-by-Word basis.
These operations can be performed using a single
low voltage (2.7 to 3.6V) supply. V
drive the I/O pin down to 1.65V. An optional 12V
V
tomer programming.
The device features an asymmetrical blocked ar-
chitecture with an array of 71 blocks: 8 Parameter
Blocks of 4 KWords and 63 Main Blocks of 32
KWords. The M36W832TE has the Parameter
Blocks at the top of the memory address space
while the M36W832BE locates the Parameter
Blocks starting from the bottom. The memory
maps are shown in Figure 5, Block Addresses.
The Flash Memory features an instant, individual
block locking scheme that allows any block to be
locked or unlocked with no latency, enabling in-
stant code and data protection. All blocks have
three levels of protection. They can be locked and
locked-down individually preventing any acciden-
tal programming or erasure. There is an additional
hardware protection against program and erase.
When V
Figure 5. Flash Block Addresses
Note: Also see Appendix A, Tables 26 and 27 for a full listing of the Flash Block Addresses.
PPF
power supply is provided to speed up cus-
PPF
1FFFFF
1F8FFF
1F7FFF
00FFFF
1FF000
007FFF
1F8000
1F0000
008000
000000
Top Boot Block Addresses
V
PPLK
32 KWords
32 KWords
32 KWords
4 KWords
4 KWords
all blocks are protected
DDQF
4 KWord Blocks
32 KWord Blocks
Total of 8
allows to
Total of 63
against program or erase. All blocks are locked at
Power Up.
Each block can be erased separately. Erase can
be suspended in order to perform either read or
program in any other block and then resumed.
Program can be suspended to read data in any
other block and then resumed. Each block can be
programmed and erased over 100,000 cycles.
The device includes a Protection Register to in-
crease the protection of a system design. The Pro-
tection Register is divided into two segments, the
first is a 64 bit area which contains a unique device
number written by ST, while the second is a 128 bit
area, one-time-programmable by the user. The
user programmable segment can be permanently
protected. Figure 6, shows the Flash Security
Block and Protection Register Memory Map.
Program and Erase commands are written to the
Command Interface of the memory. An on-chip
Program/Erase Controller takes care of the tim-
ings necessary for program and erase operations.
The end of a program or erase operation can be
detected and any error conditions identified. The
command set required to control the memory is
consistent with JEDEC standards.
1FFFFF
1F7FFF
00FFFF
007FFF
1F8000
1F0000
000000
008000
007000
000FFF
Bottom Boot Block Addresses
32 KWords
32 KWords
4 KWords
32 KWords
4 KWords
M36W832TE, M36W832BE
4 KWord Blocks
32 KWord Blocks
AI90164
Total of 8
Total of 63
11/64

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