w9425g6eh Winbond Electronics Corp America, w9425g6eh Datasheet - Page 9

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w9425g6eh

Manufacturer Part Number
w9425g6eh
Description
4 M ? 4 Banks ? 16 Bits Ddr Sdram
Manufacturer
Winbond Electronics Corp America
Datasheet

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7. FUNCTIONAL DESCRIPTION
7.1
Command
CLK
CLK
(1)
(2)
(3)
(4)
(5)
(6)
(7)
(8)
(9)
Power Up Sequence
maintain stable
for 200 µS min.
1) Apply V
2) Apply V
Apply power and attempt to CKE at a low state ( ≤ 0.2V), all other inputs may be undefined
Start Clock and maintain stable condition for 200 µS (min.).
After stable power and clock, apply NOP and take CKE high.
Issue precharge command for all banks of the device.
Issue EMRS (Extended Mode Register Set) to enable DLL and establish Output Driver Type.
Issue MRS (Mode Register Set) to reset DLL and set device to idle with bit A8.
(An additional 200 cycles(min) of clock are required for DLL Lock before any executable
command applied.)
Issue precharge command for all banks of the device.
Issue two or more Auto Refresh commands.
Issue MRS-Initialize device operation with the reset DLL bit deactivated A8 to low.
PREA
Inputs
t
RP
DD
DDQ
Enable DLL
before or at the same time as V
EMRS
before or at the same time as V
2 Clock min.
Initialization sequence after power-up
DLL reset with A8 = High
MRS
2 Clock min.
PREA
- 9 -
t
RP
DDQ
TT
AREF
.
and V
200 Clock min.
t
RFC
REF
Publication Release Date:May 07, 2008
.
AREF
t
RFC
W9425G6EH
Disable DLL reset with A8 = Low
MRS
Revision A05
2 Clock min.
CMD
ANY

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