cy62146e Cypress Semiconductor Corporation., cy62146e Datasheet

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cy62146e

Manufacturer Part Number
cy62146e
Description
4-mbit 256k X 16 Static Ram
Manufacturer
Cypress Semiconductor Corporation.
Datasheet

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Features
Functional Description
The CY62146E is a high performance CMOS static RAM
organized as 256K words by 16 bits. This device features
advanced circuit design to provide ultra low active current. It is
ideal for providing More Battery Life™ (MoBL
cations such as cellular telephones. The device also has an
automatic power down feature that reduces power consumption
when addresses are not toggling. Placing the device into standby
Cypress Semiconductor Corporation
Document Number: 001-07970 Rev. *D
Logic Block Diagram
Very high speed: 45 ns
Wide voltage range: 4.5V–5.5V
Ultra low standby power
Ultra low active power
Easy memory expansion with CE and OE features
Automatic power down when deselected
CMOS for optimum speed and power
Available in Pb-free 44-pin TSOP II package
Typical standby current: 1 μA
Maximum standby current: 7 μA
Typical active current: 2 mA at f = 1 MHz
A
A
A
A
A
A
A
A
A
A
A
3
2
1
0
9
8
7
6
5
4
10
®
) in portable appli-
198 Champion Court
COLUMN DECODER
DATA IN DRIVERS
RAM Array
256K x 16
mode reduces power consumption by more than 99% when
deselected (CE HIGH). The input and output pins (IO
IO
To write to the device, take Chip Enable (CE) and Write Enable
(WE) inputs LOW. If Byte Low Enable (BLE) is LOW, then data
from IO pins (IO
specified on the address pins (A
Enable (BHE) is LOW, then data from IO pins (IO
is written into the location specified on the address pins (A
through A
To read from the device, take Chip Enable (CE) and Output
Enable (OE) LOW while forcing the Write Enable (WE) HIGH. If
Byte Low Enable (BLE) is LOW, then data from the memory
location specified by the address pins appears on IO
Byte High Enable (BHE) is LOW, then data from memory
appears on IO
of read and write modes.
For best practice recommendations, refer to the Cypress
application note
4-Mbit (256K x 16) Static RAM
Deselected (CE HIGH)
Outputs are disabled (OE HIGH)
Both Byte High Enable and Byte Low Enable are disabled
(BHE, BLE HIGH)
Write operation is active (CE LOW and WE LOW)
15
) are placed in a high impedance state when:
17
San Jose
).
8
to IO
AN1064, SRAM System
0
through IO
,
15
CA 95134-1709
. See
IO
IO
0
8
–IO
–IO
Table 1
BHE
WE
CE
OE
BLE
7
15
7
CY62146E MoBL
) is written into the location
0
Revised February 01, 2008
through A
for a complete description
Guidelines.
17
). If Byte High
8
408-943-2600
through IO
0
0
to IO
through
7
®
15
. If
0
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[+] Feedback
)

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cy62146e Summary of contents

Page 1

... Available in Pb-free 44-pin TSOP II package Functional Description The CY62146E is a high performance CMOS static RAM organized as 256K words by 16 bits. This device features advanced circuit design to provide ultra low active current ideal for providing More Battery Life™ (MoBL cations such as cellular telephones ...

Page 2

... Range (V) CC Speed (ns MHz [2] [2] Typ Max Typ 5.0 5 CY62146E MoBL [1] Power Dissipation Operating I , (mA) CC Standby, I (μ max [2] [2] Max Typ Max Typ 2 25°C. CC CC(typ) A Page ® SB2 ...

Page 3

... CC CC(typ) Test Conditions Still Air, soldered × 4.5 inch, two layer printed circuit board (min) and 200 μs wait time after SB2 CCDR CY62146E MoBL [3, 4] .......................................–0.5V to 6.0V Ambient Range V CC Temperature Ind’l/Auto-A –40°C to +85°C 4.5V–5. (Ind’l/Auto-A) ...

Page 4

... Figure 3. Data Retention Waveform DATA RETENTION MODE V V > 2.0V CC(min CDR > 100 μs or stable at V > 100 μ CC(min) CC(min) ® CY62146E MoBL 90% 10% Fall Time = 1 V/ Unit Ω Ω Ω V [2] Min Typ Max Unit 2 V μA ...

Page 5

... AC Test Loads and Waveforms on page OH is less than less than less than t LZCE HZBE LZBE HZOE , BHE, BLE or both = V IL CY62146E MoBL 45 ns (Ind’l/Auto-A) Unit Min Max ...

Page 6

... Address valid before or similar to CE, BHE, BLE transition LOW. Document Number: 001-07970 Rev OHA DOE t DBE DATA VALID 50% , BHE, BLE, or both = CY62146E MoBL [14, 15] DATA VALID [15, 16 HZCE t HZOE t HZBE HIGH IMPEDANCE Page ® ...

Page 7

... During this period, the IOs are in output state. Do not apply input signals. Document Number: 001-07970 Rev. *D [13, 17, 18 SCE PWE DATA IN [13, 17, 18 SCE PWE DATA IN ® CY62146E MoBL Page [+] Feedback [+] Feedback ...

Page 8

... BHE/BLE NOTE 19 DATA IO Document Number: 001-07970 Rev SCE PWE t SD DATA IN t HZWE SCE PWE t HZWE t SD DATA IN ® CY62146E MoBL [18 LZWE [18 LZWE Page [+] Feedback [+] Feedback ...

Page 9

... Data In (IO –IO ); Write –IO in High Package Package Type Diagram 51-85087 44-pin Thin Small Outline Package II (Pb-free) 51-85087 44-pin Thin Small Outline Package II (Pb-free) ® CY62146E MoBL Mode Power Standby ( Active ( Active ( Active ( Active ( ...

Page 10

... Package Diagrams Document Number: 001-07970 Rev. *D Figure 10. 44-Pin TSOP II, 51-85087 ® CY62146E MoBL 51-85087-*A Page [+] Feedback [+] Feedback ...

Page 11

... Document History Page ® Document Title: CY62146E MoBL 4-Mbit (256K x 16) Static RAM Document Number: 001-07970 REV. ECN NO. Issue Date ** 463213 See ECN *A 684343 See ECN *B 925501 See ECN *C 1045260 See ECN *D 2073548 See ECN VKN/AESA Corrected typo in the Data Retention Waveform and removed its irrelevant © ...

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