m95512 STMicroelectronics, m95512 Datasheet - Page 19
m95512
Manufacturer Part Number
m95512
Description
512kbit Serial Spi Bus Eeprom With High Speed Clock
Manufacturer
STMicroelectronics
Datasheet
1.M95512.pdf
(31 pages)
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Figure 14. Page Write (WRITE) Sequence
POWER-UP AND DELIVERY STATE
Power-up State
After Power-up, the device is in the following state:
–
–
–
–
–
The SRWD, BP1 and BP0 bits of the Status Reg-
ister are unchanged from the previous power-
down (they are non-volatile bits).
Standby Power mode
Deselected (after Power-up, a falling edge is
required on Chip Select (S) before any
instructions can be started).
Not in the Hold Condition
Write Enable Latch (WEL) is reset to 0
Write In Progress (WIP) is reset to 0
S
C
D
S
C
D
7
32
0
6
33
1
5
34
Data Byte 2
2
4
Instruction
35 36 37 38 39 40 41 42
3
3
4
2
5
1
6
0
7
7
15
8
6
14 13
9 10
5
Data Byte 3
16-Bit Address
4
43
3
Initial Delivery State
The device is delivered with the memory array set
at all 1s (FFh). The Status Register Write Disable
(SRWD) and Block Protect (BP1 and BP0) bits are
initialized to 0.
44 45 46 47
3
20 21 22 23 24 25 26 27
2
2
1
1
0
0
7
6
6
5
Data Byte N
5
Data Byte 1
4
4
3
3
28 29 30
2
2
1
1
0
0
31
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