m24c64-df STMicroelectronics, m24c64-df Datasheet - Page 14

• Manufacturer Part Number: m24c64-df
• Description: 64 Kbit Serial I?c Bus Eeprom
• Manufacturer: STMicroelectronics

Device operation
4.5
14/44
Memory addressing
To start communication between the bus master and the slave device, the bus master must
initiate a Start condition. Following this, the bus master sends the device select code, shown
in
The device select code consists of a 4-bit device type identifier, and a 3-bit Chip Enable
“Address” (E2, E1, E0). To address the memory array, the 4-bit device type identifier is
1010b. Up to eight memory devices can be connected on a single I
given a unique 3-bit code on the Chip Enable (E2, E1, E0) inputs. When the device select
code is received, the device only responds if the Chip Enable Address is the same as the
value on the Chip Enable (E2, E1, E0) inputs.
The 8
If a match occurs on the device select code, the corresponding device gives an
acknowledgment on Serial Data (SDA) during the 9
the device select code, it deselects itself from the bus, and goes into Standby mode.
Table 5.
1. X =
a. Only one M24C64 in WLCSP package can be connected on the I²C bus (see
Current Address
Read
Random Address
Read
Sequential Read
Byte Write
Page Write
Table 3
th
Mode
V
IH
bit is the Read/Write bit (RW). This bit is set to 1 for Read and 0 for Write operations.
or V
(on Serial Data (SDA), most significant bit first).
IL
Operating modes
.
RW bit WC
1
0
1
1
0
0
V
V
X
X
X
X
IL
IL
Doc ID 16891 Rev 23
(1)
Bytes
≤ 32
≥ 1
1
1
1
M24C64-DF, M24C64-W, M24C64-R, M24C64-F
th
Start, device select, RW = 1
Start, device select, RW = 0, Address
reStart, device select, RW = 1
Similar to Current or Random Address
Read
Start, device select, RW = 0
Start, device select, RW = 0
bit time. If the device does not match
Initial sequence
Figure
2
C bus
3).
(a)
. Each one is