is43r16160 Integrated Silicon Solution, Inc., is43r16160 Datasheet - Page 31
is43r16160
Manufacturer Part Number
is43r16160
Description
32mx8, 16mx16 256mb Synchronous Dram
Manufacturer
Integrated Silicon Solution, Inc.
Datasheet
1.IS43R16160.pdf
(37 pages)
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IS43R16160
Integrated Silicon Solution, Inc.
Rev. 00A
09/10/08
[Write interrupted by Read]
[Write interrupted by Write]
access is allowed. Internal WRITE to READ command interval(tWTR) is minimum 1 CLK. The
input data on DQ at the interrupting READ cycle is "don't care". tWTR is referenced from the first
positive edge after the last data input.
Burst write operation can be interrupted by write of any bank. Random column access is allowed.
WRITE to WRITE interval is minimum 1 CLK.
Burst write operation can be interrupted by read of the same or the other bank. Random column
Command
A0-9,11,12
Command
A0-9,11,12
BA0,1
BA0,1
/CLK
DQS
/CLK
CLK
A10
CLK
A10
DQ
DM
DQ
QS
WRITE
WRITE
Yi
00
Yi
00
0
0
WRITE
Dai0
Yj
00
Dai0 Dai1
0
Dai1
Daj0
Write Interrupted by Read (BL=8, CL=2.5)
Write Interrupted by Write (BL=8)
tWTR
Daj1
WRITE
READ
Daj2
Yk
10
Yj
00
0
0
Daj3
Dak0
Dak1
Dak2
Dak3
WRITE
Qaj0
Dak4
Yl
00
0
Dak5
Qaj1 Qaj2 Qaj3
Dal0
Dal1
Qaj4 Qaj5 Qaj6
Dal2 Dal3
Dal4
Dal5 Dal6
Qaj7
Dal7
31