is42s32160c Integrated Silicon Solution, Inc., is42s32160c Datasheet - Page 16

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is42s32160c

Manufacturer Part Number
is42s32160c
Description
16mx32 512mb Synchronous Dram
Manufacturer
Integrated Silicon Solution, Inc.
Datasheet

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IS42S32160C
16
• Addressing Sequence of Interleave Mode
A column access is started in the input column address and is performed by inverting the address
bits in the sequence shown in the following table.
This field specifies the number of clock cycles from the assertion of the Read command to the first
read data.The minimum whole value of CAS# Latency depends on the frequency of CLK.The
minimum whole value satisfying the following formula must be programmed into this field.
t
CAS# Latency Field (A6~A4)
CAC
Data n
Data 0
Data 1
Data 2
Data 3
Data 4
Data 5
Data 6
Data 7
(min)<=CAS# Latency X t
A8
A8
A8
A8
A8
A8
A8
A8
A7
A7
A7
A7
A7
A7
A7
A7
A6
A6
A6
A6
A6
A6
A6
A6
CK
A6
A5
A5
A5
A5
A5
A5
A5
A5
0
0
0
0
1
Column Address
A5
0
0
1
1
X
A4
A4
A4
A4
A4
A4
A4
A4
A4
0
1
0
1
X
A3
A3
A3
A3
A3
A3
A3
A3
Reserved
Reserved
2 clocks
3 clocks
Reserved
CAS#Latency
A2
A2
A2
A2
A2#
A2#
A2#
A2#
A1
A1
A1#
A1#
A1
A1
A1#
A1#
A0
A0#
A0
A0#
A0
A0#
A0
A0#
4 words
Integrated Silicon Solution, Inc.
Burst Length
8 words
Rev. B
01/22/09

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