is62vv25616ll Integrated Silicon Solution, Inc., is62vv25616ll Datasheet - Page 7

• Manufacturer Part Number: is62vv25616ll
• Description: 256k X 16 Low Voltage, 1.8v Ultra Low Power Cmos Static Ram
• Manufacturer: Integrated Silicon Solution, Inc.

IS62VV25616LL
WRITE CYCLE SWITCHING CHARACTERISTICS
Notes:
1. Test conditions assume signal transition times of 5 ns or less, timing reference levels of 0.9V, input pulse levels of 0.4V to 1.4V and
2. The internal write time is defined by the overlap of CE LOW and UB or LB, and WE LOW. All signals must be in valid states to initiate a Write, but
3. Tested with the load in Figure 2. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.
Integrated Silicon Solution, Inc. — www.issi.com —
Rev. B
08/07/02
AC WAVEFORMS
WRITE CYCLE NO. 1
Notes:
1. WRITE is an internally generated signal asserted during an overlap of the LOW states on the CE and WE inputs and at least one of
2. WRITE = (CE) [ (LB) = (UB) ] (WE).
Symbol
t
t
t
t
t
t
t
t
t
t
t
output loading specified in Figure 1.
any one can go inactive to terminate the Write. The Data Input Setup and Hold timing are referenced to the rising or falling edge of the signal that terminates the write.
the LB and UB inputs being in the LOW state.
WC
SCE
AW
HA
SA
PWB
PWE
SD
HD
HZWE
LZWE
ADDRESS
(3)
(3)
UB, LB
D
OUT
WE
D
Parameter
Write Cycle Time
CE to Write End
Address Setup Time to Write End
Address Hold from Write End
Address Setup Time
LB, UB Valid to End of Write
WE Pulse Width
Data Setup to Write End
Data Hold from Write End
WE LOW to High-Z Output
WE HIGH to Low-Z Output
CE
IN
(1,2)
DATA UNDEFINED
t
SA
(CE Controlled, OE = HIGH or LOW)
t
HZWE
t
VALID ADDRESS
AW
1-800-379-4774
t
t
PWE1
PWE2
t
t
SCS
t
WC
(1,2)
PBW
HIGH-Z
(Over Operating Range)
t
Min.
SD
70
65
65
60
55
30
—
DATA
0
0
0
5
-70
IN
Max.
VALID
30
—
—
—
—
—
—
—
—
—
—
t
HD
t
LZWE
Min.
85
70
70
70
60
35
t
—
0
0
0
5
HA
-85
Max.
—
30
—
—
—
—
—
—
—
—
—
ISSI
UB_CSWR1.eps
Unit
1ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
®
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