at49bv001ant ATMEL Corporation, at49bv001ant Datasheet

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at49bv001ant

Manufacturer Part Number
at49bv001ant
Description
At49bv001a 1-megabit 128k X 8 Single 2.7-volt Battery-voltage Flash Memory
Manufacturer
ATMEL Corporation
Datasheet

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Features
1. Description
The AT49BV001A(N)(T) is a 2.7-volt-only in-system reprogrammable Flash Memory.
Its 1 megabit of memory is organized as 131,072 words by 8 bits. Manufactured with
Atmel’s advanced nonvolatile CMOS technology, the device offers access times to
55 ns with power dissipation of just 54 mW over the industrial temperature range.
When the device is deselected, the CMOS standby current is less than 50 µA. For the
AT49BV001AN(T), pin 1 for the PLCC package and pin 9 for the TSOP package are
n o c o n n ec t p i ns . T o a l l ow fo r s i m p l e i n - s y s te m r e pr og r a m m ab i l i t y , t h e
AT49BV001A(N)(T) does not require high input voltages for programming. Five-volt-
only commands determine the read and programming operation of the device. Read-
ing data out of the device is similar to reading from an EPROM; it has standard CE,
OE, and WE inputs to avoid bus contention. Reprogramming the AT49BV001A(N)(T)
is performed by erasing a block of data and then programming on a byte by byte
basis. The byte programming time is a fast 30 µs. The end of a program cycle can be
optionally detected by the DATA polling feature. Once the end of a byte program cycle
has been detected, a new access for a read or program can begin. The typical num-
ber of program and erase cycles is in excess of 10,000 cycles.
The device is erased by executing the erase command sequence; the device inter-
nally controls the erase operations. There are two 8K byte parameter block sections,
two main memory blocks, and one boot block.
The device has the capability to protect the data in the boot block; this feature is
enabled by a command sequence. The 16K-byte boot block section includes a repro-
gramming lock out feature to provide data integrity. The boot sector is designed to
contain user secure code, and when the feature is enabled, the boot sector is pro-
tected from being reprogrammed.
In the AT49BV001AN(T), once the boot block programming lockout feature
is enabled, the contents of the boot block are permanent and cannot be changed.
In the AT49BV001A(T), once the boot block programming lockout feature is enabled,
the contents of the boot block cannot be changed with input voltage levels of 5.5 volts
or less.
Single Supply for Read and Write: 2.7 to 3.6V
Fast Read Access Time – 55 ns
Internal Program Control and Timer
Sector Architecture
Fast Erase Cycle Time – 3 Seconds
Byte-by-Byte Programming – 30 µs/Byte Typical
Hardware Data Protection
DATA Polling for End of Program Detection
Low Power Dissipation
Typical 10,000 Write Cycles
Green (Pb/Halide-free) Packaging Option
– One 16K Bytes Boot Block with Programming Lockout
– Two 8K Bytes Parameter Blocks
– Two Main Memory Blocks (32K Bytes, 64K Bytes)
– 15 mA Active Current
– 50 µA CMOS Standby Current
1-megabit
(128K x 8)
Single 2.7-volt
Battery-Voltage
Flash Memory
AT49BV001A
AT49BV001AN
AT49BV001AT
AT49BV001ANT
3364D–FLASH–3/05

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at49bv001ant Summary of contents

Page 1

... In the AT49BV001A(T), once the boot block programming lockout feature is enabled, the contents of the boot block cannot be changed with input voltage levels of 5.5 volts or less. 1-megabit (128K x 8) Single 2.7-volt Battery-Voltage Flash Memory AT49BV001A AT49BV001AN AT49BV001AT AT49BV001ANT 3364D–FLASH–3/05 ...

Page 2

Pin Configurations Pin Name A0 - A16 RESET I/O0 - I/O7 NC 2.1 32-lead PLCC Top View 2.2 32-lead VSOP ( mm) or 32-lead TSOP, Type mm) Top View Note: ...

Page 3

... Read The AT49BV001A(N)(T) is accessed like an EPROM. When CE and OE are low and WE is high, the data stored at the memory location determined by the address pins is asserted on the out- puts. The outputs are put in the high impedance state whenever high. This dual-line control gives designers flexibility in preventing bus contention ...

Page 4

... If the boot block lockout has been enabled, the Chip Erase function will erase Parameter Block 1, Parameter Block 2, Main Memory Block but not the boot block. If the Boot Block Lockout has not been enabled, the Chip Erase function will erase the entire chip. After the full chip erase the device will return back to read mode ...

Page 5

... Once the feature is enabled, the data in the boot block can no longer be erased or programmed with input voltage of 5.5V or less. Data in the main memory block can still be changed through the regular programming method. To activate the lockout feature, a series of six program com- mands to specific addresses with specific data must be performed. Please refer to the “ ...

Page 6

... SA = 1A000 to 1BFFF for PARAMETER BLOCK 18000 to 19FFF for PARAMETER BLOCK 10000 to 17FFF for MAIN MEMORY ARRAY BLOCK 00000 to 0FFFF for MAIN MEMORY ARRAY BLOCK 2 6. Absolute Maximum Ratings Temperature Under Bias................................ -55°C to +125°C Storage Temperature ..................................... -65°C to +150°C ...

Page 7

DC and AC Operating Range Operating Temperature (Case) V Power Supply CC 8. Operating Modes Mode CE Read V IL (2) Program/Erase V IL Standby/Write Inhibit V IH Program Inhibit X Program Inhibit X Output Disable X Reset X ...

Page 8

AC Read Characteristics Symbol Parameter t Address to Output Delay ACC ( Output Delay CE ( Output Delay OE (3)( Output Float DF Output Hold from OE, CE ...

Page 9

Input Test Waveform and Measurement Level DRIVING LEVELS < 13. Output Load Test 14. Pin Capacitance ( MHz 25°C Symbol Typ OUT ...

Page 10

AC Byte Load Characteristics Symbol Parameter Address, OE Set-up Time AS OES t Address Hold Time AH t Chip Select Set-up Time CS t Chip Select Hold Time CH t Write Pulse Width (WE or CE) ...

Page 11

Program Cycle Characteristics Symbol Parameter t Byte Programming Time BP t Address Set-up Time AS t Address Hold Time AH t Data Set-up Time DS t Data Hold Time DH t Write Pulse Width WP t Write Pulse Width ...

Page 12

Data Polling Characteristics Symbol Parameter t Data Hold Time Hold Time OEH ( Output Delay OE t Write Recovery Time WR Notes: 1. These parameters are characterized and not 100% tested. 2. See ...

Page 13

Software Product Identification (1) Entry LOAD DATA AA TO ADDRESS 555 LOAD DATA 55 TO ADDRESS AAA LOAD DATA 90 TO ADDRESS 555 ENTER PRODUCT IDENTIFICATION (2)(3)(5) MODE 25. Software ProductIdentification (1) Exit OR LOAD DATA AA TO ADDRESS ...

Page 14

... AT49BV001ANT-55JI 32J AT49BV001ANT-55TI 32T AT49BV001ANT-55VI 32V Ordering Code Package AT49BV001AN-55TU 32T AT49BV001AN-55VU 32V AT49BV001ANT-55JU 32J AT49BV001ANT-55TU 32T AT49BV001ANT-55VU 32V Package Type Operation Range Industrial (-40° to 85°C) Industrial (-40° to 85°C) Industrial (-40° to 85°C) Industrial (-40° to 85°C) Operation Range Industrial (-40° ...

Page 15

Packaging Information 28.1 32J – PLCC 1.14(0.045) X 45˚ 0.51(0.020)MAX 45˚ MAX (3X) Notes: 1. This package conforms to JEDEC reference MS-016, Variation AE. 2. Dimensions D1 and E1 do not include mold protrusion. Allowable protrusion is ...

Page 16

TSOP Pin 1 Identifier e E Notes: 1. This package conforms to JEDEC reference MO-142, Variation BD. 2. Dimensions D1 and E do not include mold protrusion. Allowable protrusion 0.15 mm per side and ...

Page 17

VSOP Pin 1 Identifier e E Notes: 1. This package conforms to JEDEC reference MO-142, Variation BA. 2. Dimensions D1 and E do not include mold protrusion. Allowable protrusion 0.15 mm per side and ...

Page 18

... Atmel Corporation 2005. All rights reserved. Atmel SM Everywhere You Are and others are the trademarks of Atmel Corporation or its subsidiaries. Other terms and product names may be trademarks of others. Atmel Operations Memory ...

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