74alvt16823dl NXP Semiconductors, 74alvt16823dl Datasheet

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74alvt16823dl

Manufacturer Part Number
74alvt16823dl
Description
18-bit Bus-interface D-type Flip-flop With Reset And Enable 3-state
Manufacturer
NXP Semiconductors
Datasheet
1.74ALVT16823DL.pdf (20 pages)
1. General description
2. Features
The 74ALVT16823 18-bit bus interface register is designed to eliminate the extra
packages required to buffer existing registers and provide extra data width for wider
data/address paths of buses carrying parity.
The 74ALVT16823 has two 9-bit wide buffered registers with clock enable (pin nCE) and
master reset (pin nMR) which are ideal for parity bus interfacing in high microprogrammed
systems.
The registers are fully edge-triggered. The state of each D input, one set-up time before
the LOW-to-HIGH clock transition is transferred to the corresponding Q output of the
flip-flop.
It is designed for V
74ALVT16823
18-bit bus-interface D-type flip-flop with reset and enable;
3-state
Rev. 04 — 2 August 2005
Two sets of high speed parallel registers with positive edge-triggered D-type flip-flops
5 V I/O compatible
Ideal where high speed, light loading, or increased fan-in are required with MOS
microprocessors
Bus hold data inputs eliminate the need for external pull-up resistors to hold unused
inputs
Live insertion and extraction permitted
Power-up 3-state
Power-up reset
No bus current loading when output is tied to 5 V bus
Output capability: +64 mA to 32 mA
Latch-up protection:
ESD protection:
JESD78: exceeds 500 mA
MIL STD 883, method 3015: exceeds 2000 V
Machine Model: exceeds 200 V
CC
operation from 2.5 V to 3.0 V with I/O compatibility to 5 V.
Product data sheet

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74alvt16823dl Summary of contents

Page 1

D-type flip-flop with reset and enable; 3-state Rev. 04 — 2 August 2005 1. General description The 74ALVT16823 18-bit bus interface register is designed to eliminate the extra packages required to buffer existing registers and provide extra ...

Page 2

... Ordering information Table 2: Ordering information Type number Package temperature range Name 74ALVT16823DL +85 C 74ALVT16823DGG +85 C 74ALVT16823_4 Product data sheet 18-bit bus-interface D-type flip-flop with reset and enable; 3-state Quick reference data Conditions propagation delay pF; V ...

Page 3

Philips Semiconductors 5. Functional diagram Fig 1. IEC logic symbol Fig 2. Bushold circuit (one data input) 74ALVT16823_4 Product data sheet 18-bit bus-interface D-type flip-flop with reset and enable; 3-state 2 1OE EN1 1 1MR R2 55 1CE G3 56 ...

Page 4

nMR nOE nQ0 Fig 3. Logic diagram nD2 nD3 nD4 nD5 nQ1 nQ2 nQ3 nQ4 nD6 ...

Page 5

Philips Semiconductors 6. Pinning information 6.1 Pinning Fig 4. Pin configuration 6.2 Pin description Table 3: Symbol 1MR 1OE 1Q0 GND 1Q1 1Q2 V CC 1Q3 74ALVT16823_4 Product data sheet 18-bit bus-interface D-type flip-flop with reset and enable; 3-state 1 ...

Page 6

Philips Semiconductors Table 3: Symbol 1Q4 1Q5 GND 1Q6 1Q7 1Q8 2Q0 2Q1 2Q2 GND 2Q3 2Q4 2Q5 V CC 2Q6 2Q7 GND 2Q8 2OE 2MR 2CP 2CE 2D8 GND 2D7 2D6 V CC 2D5 2D4 2D3 GND 2D2 2D1 ...

Page 7

Philips Semiconductors Table 3: Symbol V CC 1D2 1D1 GND 1D0 1CE 1CP 7. Functional description 7.1 Function table Table 4: Operating mode clear load and read data hold high-impedance [ HIGH voltage level HIGH voltage ...

Page 8

Philips Semiconductors Table 5: In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol stg T j [1] The input and output negative voltage ratings may be exceeded if the input and output clamp current ratings ...

Page 9

Philips Semiconductors 10. Static characteristics Table 7: Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V); T Symbol Parameter [ 2 input clamping voltage IK V HIGH-level ...

Page 10

Philips Semiconductors Table 7: Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V); T Symbol Parameter V LOW-level output voltage OL V power-up LOW-level output OL(pu) voltage I input leakage current LI control pins ...

Page 11

Philips Semiconductors [10] This parameter is valid for any transition time of 100 s is permitted. This parameter is valid for T 11. Dynamic characteristics Table 8: Voltages are referenced to GND (ground = 0 V); for ...

Page 12

Philips Semiconductors Table 8: Voltages are referenced to GND (ground = 0 V); for test circuit see +85 C. amb Symbol Parameter t PHZ t PLZ t su(H) t su(L) t h(H) t h(L) t ...

Page 13

Philips Semiconductors Fig 6. Data set-up and hold times Fig 7. Master reset pulse width, master reset to output delay and master reset to clock Fig 8. 3-state output enable time to HIGH-level and output disable time from HIGH-level 74ALVT16823_4 ...

Page 14

Philips Semiconductors Fig 9. 3-state output enable time to LOW-level and output disable time from LOW-level Table 9: Supply voltage 3 V 2.7 V 74ALVT16823_4 Product data sheet 18-bit bus-interface D-type flip-flop with reset and enable; 3-state V I input ...

Page 15

Philips Semiconductors a. Input pulse definition b. Test circuit Fig 10. Load circuitry for switching times Table 10: Input whichever is less 74ALVT16823_4 Product data sheet 18-bit bus-interface D-type flip-flop with reset and enable; ...

Page 16

Philips Semiconductors 13. Package outline SSOP56: plastic shrink small outline package; 56 leads; body width 7 pin 1 index 1 e DIMENSIONS (mm are the original dimensions) A UNIT max. ...

Page 17

Philips Semiconductors TSSOP56: plastic thin shrink small outline package; 56 leads; body width 6 pin 1 index 1 DIMENSIONS (mm are the original dimensions). A UNIT max. 0.15 1.05 mm ...

Page 18

Philips Semiconductors 14. Revision history Table 11: Revision history Document ID Release date 74ALVT16823_4 20050802 • Modifications: The format of this data sheet has been redesigned to comply with the new presentation and information standard of Philips Semiconductors. • Section ...

Page 19

Philips Semiconductors 15. Data sheet status [1] Level Data sheet status Product status I Objective data Development II Preliminary data Qualification III Product data Production [1] Please consult the most recently issued data sheet before initiating or completing a design. ...

Page 20

Philips Semiconductors 20. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . ...

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