74aup2gu04 NXP Semiconductors, 74aup2gu04 Datasheet
74aup2gu04
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74aup2gu04 Summary of contents
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... Low-power dual unbuffered inverter Rev. 01 — 15 December 2006 1. General description The 74AUP2GU04 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible families. This device ensures a very low static and dynamic power consumption across the entire V range from 0 3.6 V. ...
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... Fig 4. Pin configuration SOT363 (SC-88) 74AUP2GU04_1 Product data sheet Marking code mnb107 Fig 2. IEC logic symbol 74AUP2GU04 GND 001aad700 Transparent top view Fig 5. Pin configuration SOT886 (XSON6) Rev. 01 — 15 December 2006 ...
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... Conditions V < > < +125 C amb derates linearly with 4.0 mW/K. tot derates linearly with 2.4 mW/K. tot Rev. 01 — 15 December 2006 74AUP2GU04 Low-power dual unbuffered inverter Min Max Unit 0.5 +4 [1] 0.5 +4 [ ...
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... GND GND GND GND Rev. 01 — 15 December 2006 74AUP2GU04 Low-power dual unbuffered inverter Min Max 0.8 3 +125 0 200 Min Typ Max 0. 0. ...
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... 1 1 1 2 3 2 4 Rev. 01 — 15 December 2006 74AUP2GU04 Low-power dual unbuffered inverter Min Typ Max 2.67 ...
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... [2] Figure Rev. 01 — 15 December 2006 74AUP2GU04 Low-power dual unbuffered inverter Min Typ - - - - - - - - - - - - - - - - - - - - 8 ...
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... [3][4] = GND where Rev. 01 — 15 December 2006 74AUP2GU04 Low-power dual unbuffered inverter +125 C [1] Min Typ Max Min Max ( 13 1.6 3.8 7.9 1.4 8.8 1.3 2.8 4.9 1.1 5.7 1.0 2.3 4.0 ...
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... 0 PULSE DUT GENERATOR for measuring propagation delays, set-up and hold times and pulse width L Rev. 01 — 15 December 2006 74AUP2GU04 Low-power dual unbuffered inverter PLH V M mna344 3 EXT ...
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... Product data sheet R bias = 560 0.47 F input output kHz (mA/ Rev. 01 — 15 December 2006 74AUP2GU04 Low-power dual unbuffered inverter 100 GND mna050 001aad074 (V) CC © NXP B.V. 2006. All rights reserved ...
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... NXP Semiconductors 14. Application information Some applications for the 74AUP2GU04 are: • Linear amplifier (see • Crystal oscillator (see Remark: All values given are typical values unless otherwise specified. Fig 11. Linear amplifier application Fig 12. Crystal oscillator application 74AUP2GU04_1 Product data sheet ...
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... scale 2.2 1.35 2.2 1.3 0.65 1.8 1.15 2.0 REFERENCES JEDEC JEITA SC-88 Rev. 01 — 15 December 2006 74AUP2GU04 Low-power dual unbuffered inverter detail 0.45 0.25 0.2 0.2 0.1 0.15 0.15 EUROPEAN PROJECTION SOT363 ISSUE DATE 04-11-08 06-03-16 © ...
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... Product data sheet scale 1.05 0.35 0.40 0.6 0.5 0.95 0.27 0.32 REFERENCES JEDEC JEITA MO-252 Rev. 01 — 15 December 2006 74AUP2GU04 Low-power dual unbuffered inverter 4 ( EUROPEAN PROJECTION SOT886 ISSUE DATE 04-07-15 04-07-22 © NXP B.V. 2006. All rights reserved ...
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... Product data sheet scale 1.05 0.35 0.40 0.55 0.35 0.95 0.27 0.32 REFERENCES JEDEC JEITA Rev. 01 — 15 December 2006 74AUP2GU04 Low-power dual unbuffered inverter 2 mm EUROPEAN ISSUE DATE PROJECTION 05-03-11 05-04-06 © NXP B.V. 2006. All rights reserved. SOT891 ...
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... Transistor-Transistor Logic 17. Revision history Table 12. Revision history Document ID Release date 74AUP2GU04_1 20061215 74AUP2GU04_1 Product data sheet Data sheet status Change notice Product data sheet - Rev. 01 — 15 December 2006 74AUP2GU04 Low-power dual unbuffered inverter Supersedes - © NXP B.V. 2006. All rights reserved ...
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... Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. http://www.nxp.com salesaddresses@nxp.com Rev. 01 — 15 December 2006 74AUP2GU04 Low-power dual unbuffered inverter © NXP B.V. 2006. All rights reserved ...
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... Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2006. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com All rights reserved. Date of release: 15 December 2006 Document identifier: 74AUP2GU04_1 ...