74aup1t57gf NXP Semiconductors, 74aup1t57gf Datasheet - Page 4
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74aup1t57gf
Manufacturer Part Number
74aup1t57gf
Description
74aup1t57 Low-power Configurable Gate With Voltage-level Translator
Manufacturer
NXP Semiconductors
Datasheet
1.74AUP1T57GF.pdf
(17 pages)
NXP Semiconductors
Table 5.
74AUP1T57_1
Product data sheet
Logic function
2-input AND
2-input AND with both inputs inverted
2-input NAND with inverted input
2-input OR with inverted input
2-input NOR
2-input NOR with both inputs inverted
2-input XNOR
Inverter
Buffer
Fig 5. 2-input AND gate or 2-input NOR gate with both
Fig 7. 2-input NAND gate with input C inverted or
Fig 9. 2-input XNOR gate
inputs inverted
2-input OR gate with inverted A input
C
C
C
C
C
B
B
A
A
B
Function selection table
7.1 Logic configurations
Y
Y
Y
Y
Y
B
B
A
1
2
3
1
2
3
1
2
3
6
5
4
001aab584
6
5
4
001aab586
6
5
4
001aab588
C
Y
C
Y
C
Y
V
V
V
CC
CC
CC
Rev. 01 — 3 January 2008
Low-power configurable gate with voltage-level translator
Figure
see
see
see
see
see
see
see
see
see
Fig 6. 2-input NAND gate with input B inverted or
Fig 8. 2-input NOR gate or 2-input AND gate with both
Fig 10. Inverter
Figure 5
Figure 8
Figure 6
Figure 6
Figure 8
Figure 5
Figure 9
Figure 10
Figure 11
2-input OR gate with inverted C input
inputs inverted
B
C
B
C
A
C
A
C
A
and
and
7
7
Y
Y
Y
Y
Y
A
B
A
74AUP1T57
1
2
3
1
2
3
1
2
3
6
5
4
001aab589
© NXP B.V. 2008. All rights reserved.
6
5
4
6
5
4
001aab585
001aab587
Y
C
Y
C
Y
V
V
V
CC
CC
CC
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