74aup1g374 NXP Semiconductors, 74aup1g374 Datasheet - Page 13

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74aup1g374

Manufacturer Part Number
74aup1g374
Description
74aup1g374 Low-power D-type Flip-flop; Positive-edge Trigger; 3-state
Manufacturer
NXP Semiconductors
Datasheet
NXP Semiconductors
12. Waveforms
Table 9.
74AUP1G374_1
Product data sheet
Supply voltage
V
0.8 V to 3.6 V
Fig 7. The clock input (CP) to output (Q) propagation delays, clock input (CP) pulse width, data input (D) to clock
CC
Measurement points are given in
The shaded areas indicate when the input is permitted to change for predictable output performance.
Logic levels: V
input (CP) set-up times, clock input (CP) to data input (D) hold times and the maximum frequency (CP)
Measurement points
OL
and V
CP input
Q output
D input
OH
Output
V
0.5
M
are typical output voltage drop that occur with the output load.
V
GND
GND
V
V
CC
OH
OL
V
V
Table
I
I
9.
Rev. 01 — 14 November 2006
V
M
t
su(L)
Input
V
0.5
M
Low-power D-type flip-flop; positive-edge trigger; 3-state
t
V
h
M
V
CC
V
t
W
M
t
PHL
1/f
clk
t
su(H)
V
V
I
CC
t
h
001aad498
t
PLH
74AUP1G374
t
r
3.0 ns
= t
© NXP B.V. 2006. All rights reserved.
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