m35062-001sp Mitsumi Electronics, Corp., m35062-001sp Datasheet - Page 4

• Manufacturer Part Number: m35062-001sp
• Description: Screen Character Pattern Display Controllers
• Manufacturer: Mitsumi Electronics, Corp.

MEMORY CONSTRUCTION
Address 000
2B0
36C
Table 1 The memory constitution of display RAM and register
Table 2 The memory constitution of SYRAM
TEST
4
2AA
2AB
2AC
2AD
2AE
000
2A7
2A8
2A9
2AF
2B0
30C
31C
35C
36C
300
310
350
360
add-
ress
add-
ress
16
16
16
16
16
: Name or value changes by definite ratio.
: The same name or value continues.
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
n
PC7
DA17 to DAD
DA17
(n = number) is MITSUBISHI test memory. Set 0 to all bits.
are assigned to SYRAM.
SB
SB
are assigned to the display control registers and 300
–
–
–
–
–
–
–
–
SY color setting
0
0
0
0
PC6
DA16
TEST
TEST
TEST
SG
SG
16
23
19
–
–
–
–
–
3
to 2A7
PC5
DA15
TEST
TEST
TEST
TEST
SR
SR
26
22
18
–
–
–
–
SYEX
SYEX
SYEX
SYEX
SYEX
SYEX
SYEX
SYEX
2
DAC
16
LBLACK
BLINK
SERS
PC4
DA14
TEST
TEST
TEST
TEST
12
25
17
are assigned to the display RAM, 2A8
0
0
0
–
1
3
0
S00B
S00B
S01B
S01B
S05B
S05B
S06B
S06B
DAB
PHASE
BLINK
PC3
TEST
TEST
DA13
EQP
LINE
24
0
0
0
B
–
–
0
2
2
S00A
S00A
S01A
S01A
S05A
S05A
S06A
S06A
DAA
PHASE
LEVEL
BLINK
SEND
PC2
TEST
TEST
DA12
LINE
20
11
0
0
0
G
–
1
1
4
2
PHASE
LEVEL
BLINK
SEND
PC1
DA11
SYC2
SYC2
TEST
HIDE
LINE
S009
S009
S019
S019
S059
S059
S069
S069
DA9
10
SYRAM setting
R
–
0
0
3
1
LEVEL
HP8
SEND
PC0
DA10
SYC1
SYC1
DSP1
DSP0
ERS
HSZ
VSZ
16
16
16
16
16
2
0
S008
S008
S018
S018
S058
S058
S068
S068
DA8
ALL24
HP7
SEND
SYC0
SYC0
DSP1
DSP0
ERS
NON
DAF
HSZ
VSZ
__
INT
15
15
15
15
15
1
S007
S007
S017
S017
S057
S057
S067
S067
DA7
SRAND
HP6
SEND
DSP1
___
NTSC
DSP0
DAE
BB
BB
HSZ
VSZ
ERS
PAL
Raster color setting
14
14
14
14
14
0
2
S006
S006
S016
S016
S056
S056
S066
S066
DA6
SRAND
16
16
HP5
DSP1
MPAL
DSP0
DAD
BG
BG
HSZ
VSZ
ERS
SST
13
13
13
13
13
4
1
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
to
to
SRAND
HP4
DSP0
DSP1
PALH
S005
S005
S015
S015
S055
S055
S065
S065
DAC
BR
BR
HSZ
VSZ
ERS
SST
DA5
12
12
12
12
12
3
0
The internal circuit is reset and all display control registers (address
2A8
RAM and register is shown in Figure 1 and the memory constitution
of SYRAM is shown in Figure 2.
BLINK
BLINK
BLINK
HP3
PTD
DSP1
TEST
DSP0
DAB
ERS
HSZ
VSZ
SST
11
11
11
11
11
16
5
2
S004
S004
S014
S014
S054
S054
S064
S064
DA4
16
HP2
PTD
DSP1
TEST
DSP0
DAA
ERS
CB
CB
HSZ
VSZ
SST
to 2B0
Character color setting
10
10
10
10
10
15
4
1
S003
S003
S013
S013
S053
S053
S063
S063
DA3
SEPV1
HP1
PTD
DSP1
DSP0
CG
CG
DA9
HSZ
VSZ
ERS
SST
09
09
3
9
9
9
0
16
) are set to “0”. The memory constitution of display
S002
S002
S012
S012
S052
S052
S062
S062
DA2
PTD
SEPV0
HP0
DSP1
DSP0
SLIN
DA8
CR
CR
HSZ
VSZ
ERS
08
08
2
8
8
8
4
MITSUBISHI MICROCOMPUTERS
PTD
VP7
DSP1
BLK
DSP0
SLIN
S001
S001
S011
S011
S051
S051
S061
S061
HSZ
ERS
DA7
VSZ
DA1
07
07
0
0
0
1
7
7
7
3
VP6
PTD
DSP1
DSP0
ERS
SLIN
DA6
C6
C6
HSZ
VSZ
06
06
0
–
6
6
6
2
S000
S000
S010
S010
S050
S050
S060
S060
DA0
DSP
ONV
PTC
M35062-XXXSP
VP5
DSP1
DSP0
SLIN
DA5
HSZ
VSZ
ERS
C5
C5
05
05
5
5
5
5
1
Character setting
PTC
DSP
VP4
DSP1
DSP0
SLIN
ON
DA4
HSZ
VSZ
ERS
C4
C4
04
04
4
4
4
4
0
SYRAM code
PTC
VP3
DSP1
DSP0
SBIT
DA3
HSZ
VSZ
ERS
C3
C3
03
03
3
–
3
3
3
3
00
05
06
01
COR
PTC
VP2
SEL
DSP0
DSP1
SBIT
HSZ
ERS
DA2
C2
C2
VSZ
16
16
16
16
02
02
2
2
2
2
2
VP1
PTC
SCOR
DSP1
DSP0
ERS
SBIT
DA1
HSZ
VSZ
C1
C1
01
01
1
1
1
1
1
PTC
VP0
DSP1
DSP0
SBIT
DA0
HSZ
VSZ
ERS
EX
C0
C0
00
00
0
0
0
0
0