lm21215a-1 National Semiconductor Corporation, lm21215a-1 Datasheet - Page 18

• Manufacturer Part Number: lm21215a-1
• Description: 15a High Efficiency Synchronous Buck Regulator With Frequency Synchronization
• Manufacturer: National Semiconductor Corporation

www.national.com
It is important to verify the stability by either observing the load
transient response or by using a network analyzer. A phase
margin between 45° and 70° is usually desired for voltage
mode systems. Excessive phase margin can cause slow sys-
tem response to load transients and low phase margin may
cause an oscillatory load transient response. If the load step
response peak deviation is larger than desired, increasing
f
may help but usually at the expense of phase margin.
THERMAL CONSIDERATIONS
The thermal characteristics of the LM21215A-1 are specified
using the parameter θ
ture to the ambient temperature. Although the value of θ
dependant on many variables, it still can be used to approxi-
mate the operating junction temperature of the device.
To obtain an estimate of the device junction temperature, one
may use the following relationship:
and
Where:
T
Watts (P
resistance for the LM21215A-1, T
ture in °C, and I
It is important to always keep the operating junction temper-
ature (T
temperature exceeds 165°C the device will cycle in and out
of thermal shutdown. If thermal shutdown occurs it is a sign
of inadequate heatsinking or excessive power dissipation in
the device.
Figure
the θ
test consisted of 4 layers: 1oz. copper was used for the inter-
nal layers while the external layers were plated to 2oz. copper
weight. To provide an optimal thermal connection, a 3 x 4 ar-
ray of 8 mil. vias under the thermal pad were used, and an
CROSSOVER
J
is the junction temperature in °C, P
JA
13, shown below, provides a better approximation of
for a given PCB copper area. The PCB used in this
J
IN
) below 125°C for reliable operation. If the junction
= V
200
150
100
-50
and recalculating the compensation components
50
0
10
IN
FIGURE 12. Loop Response
OUT
x I
IN
is the output load current in A.
100
), θ
GAIN
PHASE
JA
FREQUENCY (Hz)
, which relates the junction tempera-
JA
is the junction to ambient thermal
1k
A
10k
is the ambient tempera-
IN
is the input power in
100k
1M
160
140
120
100
-20
-40
80
60
40
20
0
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JA
is
18
additional sixteen 8 mil. vias under the rest of the device were
used to connect the 4 layers.
Figure 14
vs. output current for the typical application circuit shown in
Figure
PCB LAYOUT CONSIDERATIONS
PC board layout is an important part of DC-DC converter de-
sign. Poor board layout can disrupt the performance of a DC-
DC converter and surrounding circuitry by contributing to EMI,
ground bounce, and resistive voltage loss in the traces. These
can send erroneous signals to the DC-DC converter resulting
in poor regulation or instability.
Good layout can be implemented by following a few simple
design rules.
1. Minimize area of switched current loops. In a buck regulator
there are two loops where currents are switched at high slew
rates. The first loop starts from the input capacitor, to the reg-
ulator PVIN pin, to the regulator SW pin, to the inductor then
out to the output capacitor and load. The second loop starts
FIGURE 14. Maximum Ambient Temperature vs. Output
FIGURE 13. Thermal Resistance vs PCB Area (4 Layer
16, assuming a θ
shows a plot of the maximum ambient temperature
125
115
105
30
28
26
24
22
20
18
16
14
12
10
95
85
75
2
0
3
Current (0 LFM)
3
JA
4
BOARD AREA (in 2 )
Board)
value of 24 °C/W.
5
I OUT (A)
6
6
9
7
8
12
9
15
10
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