lm21215a-1 National Semiconductor Corporation, lm21215a-1 Datasheet - Page 16

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lm21215a-1

Manufacturer Part Number
lm21215a-1
Description
15a High Efficiency Synchronous Buck Regulator With Frequency Synchronization
Manufacturer
National Semiconductor Corporation
Datasheet
www.national.com
There are three main blocks of a voltage mode buck switcher
that the power supply designer must consider when designing
the control system; the power train, modulator, and the com-
pensated error amplifier. A closed loop diagram is shown in
Figure
The power train consists of the output inductor (L) with DCR
(DC resistance R
tive series resistance R
error amplifier (EA) constantly forces FB to 0.6V. The passive
compensation components around the error amplifier help
maintain system stability. The modulator creates the duty cy-
cle by comparing the error amplifier signal with an internally
generated ramp set at the switching frequency.
There are three transfer functions that must be taken into
consideration when obtaining the total open loop transfer
function; COMP to SW (Modulator) , SW to V
Train), and V
transfer function is simply the gain of the PWM modulator.
where ΔV
(nominally 0.8 V). The SW to COMP transfer function includes
the output inductor, output capacitor, and output load resis-
tance. The inductor and capacitor create two complex poles
at a frequency described by:
In addition to two complex poles, a left half plane zero is cre-
ated by the output capacitor ESR located at a frequency
described by:
9.
RAMP
OUT
is the oscillator peak-to-peak ramp voltage
to COMP (Error Amplifier). The COMP to SW
FIGURE 9. Loop Diagram
DCR
), output capacitor (C
ESR
), and load resistance (R
0
) with ESR (effec-
OUT
(Power
o
). The
30152112
16
A Bode plot showing the power train response can be seen
below.
The complex poles created by the output inductor and ca-
pacitor cause a 180° phase shift at the resonant frequency as
seen in
cause of the output capacitor ESR zero. The 180° phase shift
must be compensated out and phase boosted through the
error amplifier to stabilize the closed loop response. The com-
pensation network shown around the error amplifier in
9
these poles and zeros at the correct frequencies will stabilize
the closed loop response. The Compensated Error Amplifier
transfer function is:
The pole located at the origin gives high open loop gain at DC,
translating into improved load regulation accuracy. This pole
occurs at a very low frequency due to the limited gain of the
error amplifier; however, it can be approximated at DC for the
purposes of compensation. The other two poles and two ze-
ros can be located accordingly to stabilize the voltage mode
loop depending on the power stage complex poles and Q.
Figure 11
pensation transfer function will look like.
creates two poles, two zeros and a pole at the origin. Placing
Figure
is an illustration of what the Error Amplifier Com-
-20
-40
-60
-80
FIGURE 10. Power Train Bode Plot
60
40
20
0
100
10. The phase is boosted back up to -90° be-
GAIN
PHASE
1k
FREQUENCY (HZ)
10k
100k
1M
10M
-120
-160
-200
-240
-280
-320
-360
-40
-80
0
30152140
Figure

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