sc1189 Semtech Corporation, sc1189 Datasheet - Page 11

• Manufacturer Part Number: sc1189
• Description: Sc1189 Programmable Synchronous Dc/dc Converter, Dual Ldo Controller
• Manufacturer: Semtech Corporation

FOLDBACK CURRENT LIMITING
The SC1189 implements a “Hard Current Limit”
overcurrent protection for the switching supply output. In
a short circuit condition, this will lead to higher than nor-
mal power dissipation in the bottom side FETs. If this is
problematic, foldback current limiting can be easily and
inexpensively implemented to drastically reduce dissipa-
tion during output short circuit
For a complete design procedure for foldback current lim-
iting see Application Note AN01-2, “Foldback Current
Limit”. An abbreviated procedure is given below.
1) Choose values for I
If this ratio > 1, the value of R
Then let R
2) Choose a short circuit current (I
not be too agressive with M, a value between 2 and 3
should be sufficient. Choosing too low a value for I
result in a high value for M and may cause startup prob-
lems due to insufficient current.
POWER MANAGEMENT
V
R
IN
2007 Semtech Corp.
D
R
V
1
B
0
F
R
0
F
L1
F
=1kW and calculate R
R
Foldback current limit characteristics
I
O
A
Foldback current limit components
LIM
V
CS
R
I
OS
S
R
C
Output Current Path
R
R
1N4148
OLIM
B
D
D1
R
and R
S
R
S
F
or I
S
and calculate the ratio
Breakpoint
D
.
OLIM
OS
) and calculate M, do
must be increased.
I
OLIM
1
To CS+
To CS-
V
O
V
OS
CS
will
11
SHOR
SHOR
3) Choose V
4) Calculate the ratio of the input divider
Choose R
SHOR
SHOR
SHORT CIR
The Short circuit feature on the linear controllers is imple-
mented by using the Rds(on) of the FETs. As output cur-
rent increases, the regulation loop maintains the output
voltage by turning the FET on more and more. Eventually,
as the Rds(on) limit is reached, the FET will be unably to
turn on more fully, and output voltage will start to fall.
When the output voltage falls to approximately 50% of
nominal, the LDO controller is latched off, setting output
voltage to 0. Power must be cycled to reset the latch.
To prevent false latching due to capacitor inrush currents
or low supply rails, the current limit latch is initially dis-
abled. It is enabled at a preset time (nominally 2mS) after
both the LDOV and LDOEN rails rise above their lockout
points.
To be most effective, the linear FET Rds(on) should not be
selected artificially low, the FET should be chosen so that,
at maximum required current, it is almost fully turned on.
from a 3.3V ± 5% rail, max allowable Rds(on) would be.
Rds(on)max = (0.95*3.3-1.5)/4 » 400m
To allow for temperature effects 200m would be a suit-
able room temperature maximum, allowing a peak short
circuit current of approximately 15A for a short time be-
fore shutdown.
If, for example, a linear supply of 1.5V at 4A is required
M
R
R (
where
B
A
R
I
OLIM
I
C
(
T CIR
T CIR
T CIR
T CIRCUIT PR
OS
R
M
V
C
M
F
C
)
<R
1
V )
V
B
CUIT PR
CUIT PR
CUIT PRO O O O O TECTION - LINEARS
Forward
CUIT PR
B
V
B
and calculate R
CS
/10 and calculate R
B
R
R (
D
V
D
V
R
CS
IN
Voltage
F
R
F
TECTION - LINEARS
TECTION - LINEARS
TECTION - LINEARS
TECTION - LINEARS
V
)
F
drop
B
of
A
diode
(
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SC1189
0.6V)