tda6503a NXP Semiconductors, tda6503a Datasheet - Page 9

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tda6503a

Manufacturer Part Number
tda6503a
Description
5 V Mixers/oscillators And Synthesizers For Cable Tv And Vcr 2-band Tuners
Manufacturer
NXP Semiconductors
Datasheet

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Philips Semiconductors
8.2
8.2.1
The module address contains programmable address
bits MA1 and MA0 (see Tables 3, 4 and 9) which offer the
possibility of having several synthesizers (up to 4) in one
system by applying a specific voltage on pin CE/AS.
The relationship between bits MA1 and MA0 and the input
voltage applied to pin CE/AS is given in Table 6.
8.2.2
The write mode is defined by the address byte ADB with
bit R/W = 0 (see Tables 3 and 4).
Data bytes can be sent to the device after the address
transmission (first byte). Four data bytes are needed to
fully program the device.
Table 3 I
Table 4 I
2001 Aug 22
Address byte
Divider byte 1
Divider byte 2
Control byte
Band-switch byte
Address byte
Divider byte 1
Divider byte 2
Control byte
Band-switch byte
5 V mixers/oscillators and synthesizers for
cable TV and VCR 2-band tuners
I
2
NAME
NAME
C-bus data format: pin SW to ground
I
W
2
C-
2
2
RITE MODE
C-bus data format for write mode of TDA6502 and TDA6503
C-bus data format for write mode of TDA6502A and TDA6503A
BUS ADDRESS SELECTION
BYTE
BYTE
ADB
DB1
DB2
ADB
DB1
DB2
CB
CB
BB
BB
MSB
MSB
N7
N7
X
X
1
0
1
1
0
1
N14
N14
CP
CP
N6
N6
X
X
1
1
N13
N13
N5
N5
T2
T2
9
X
X
0
0
The bus transceiver has an auto-increment facility which
permits the programming of the device within one single
transmission (address byte + 4 data bytes). The device
can also be partially programmed providing that the first
data byte following the address byte is divider byte DB1 or
the control byte CB.
The first bit of the byte following the address byte indicates
whether frequency data (first bit = 0) or control and
band-switch data (first bit = 1) will follow. Until an I
STOP command is sent by the controller, additional data
bytes can be entered without the need to re-address the
device.
The frequency register is loaded after the 8th clock pulse
of byte DB2, the control register is loaded after the 8th
clock pulse of the byte CB and the band-switch register is
loaded after the 8th clock pulse of byte BB.
N12
N12
N4
N4
T1
T1
X
X
0
0
BIT
BIT
FMST
PUHF
N11
N11
N3
N3
T0
T0
0
0
TDA6502; TDA6502A;
TDA6503; TDA6503A
PUHF
FMST
MA1
RSA
MA1
RSA
N10
N10
N2
N2
Product specification
PVHFH
PVHFH
MA0
RSB
MA0
RSB
N9
N1
N9
N1
R/W = 0
R/W = 0
PVHFL
PVHFL
2
LSB
LSB
OS
OS
N8
N0
N8
N0
C-bus

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