tda6500 NXP Semiconductors, tda6500 Datasheet - Page 9

• Manufacturer Part Number: tda6500
• Description: 5 V Mixer/oscillator And Synthesizer For Pal And Ntsc Standards
• Manufacturer: NXP Semiconductors

Philips Semiconductors
9397 750 15057
Product data sheet
7.2.2 Read mode
Data can be read from the device by setting the R/W bit to logic 1. The data read format is
shown in
acknowledge pulse and the first data byte (status byte) is transferred on the SDA line with
the MSB first. Data is valid on the SDA line during a HIGH-level of the SCL clock signal.
A second data byte can be read from the device if the microcontroller generates an
acknowledge on the SDA line (master acknowledge). End of transmission will occur if no
master acknowledge occurs. The device will then release the data line to allow the
microcontroller to generate a STOP condition.
The POR flag is set to logic 1 at power-on. The flag is reset when an end-of-data is
detected by the device (end of a read sequence).
Control of the loop is made possible with the in-lock flag (FL) which indicates when the
loop is locked (FL = 1).
The internal AGC status is available from the AGC bit. AGC = 1 indicates when the
selected take-over point is reached.
A built-in ADC is available on the P6/ADC pin. The ADC can be used to apply AFC
information to the microcontroller from the IF section of the tuner. The relationship
between the voltage applied to the ADC input and the A2, A1 and A0 bits is given in
Table
Table 11:
[1]
Table 12:
Name
Address byte
Status byte
Symbol
A
MA1 and MA0
R/W
POR
FL
AGC
A2, A1 and A0
MSB is transmitted first.
13.
Table
Read data format
Description of bits shown in
11. After the slave address has been recognized, the device generates an
Byte
ADB
SB
Description
acknowledge
programmable address bits; see
logic 1 for read mode
power-on reset flag
in-lock flag
internal AGC flag
digital output of the 5-level ADC; see
POR = 0, normal operation
POR = 1, power-on state
FL = 0, not locked
FL = 1, the PLL is locked
AGC = 0, internal AGC not active
AGC = 1, internal AGC is active; level below 3 V
5 V mixer/oscillator and synthesizer for PAL and NTSC standards
Rev. 02 — 14 June 2005
Bit
MSB
1
POR
[1]
1
FL
Table 11
0
1
0
1
Table 7
TDA6500; TDA6501
Table 13
0
AGC
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
MA1
A2
MA0
A1
LSB
R/W = 1 A
A0
Ack
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