lt5546 Linear Technology Corporation, lt5546 Datasheet - Page 10

• Manufacturer Part Number: lt5546
• Description: 40mhz To 500mhz Vga And I/q Demodulator With 17mhz Baseband Bandwidth
• Manufacturer: Linear Technology Corporation

LT5546
APPLICATIO S I FOR ATIO
then the circuit will limit symmetrically, which will help to
prevent the output buffer from overloading. This speeds
up recovery from an overload event, which can occur
during the gain settling. The clipping level is approxi-
mately constant over temperature. The first order inte-
grated lowpass filters are used for noise filtering of the
down-converted baseband signals for both the I channel
and the Q channel. These filters are well matched in gain
response. The –3dB corner frequency is typically 17MHz.
The I/Q outputs can drive 2kΩ in parallel with a maximum
capacitive loading of 10pF at 5MHz, from all four pins to
ground. The outputs are internally biased at V
Figure 5 shows the simplified output circuit schematic of
the I channel or Q channel.
The I/Q baseband outputs can be DC-coupled to the inputs
of a baseband chip. For AC-coupled applications with large
capacitors, the STBY pin can be used to pre-bias the
outputs to nominal V
This mode draws only 3.6mA supply current. When the EN
pin is then driven high (>1V), the chip is quickly switched
to normal operating mode, avoiding the introduction of
10
I
OUT
OPTIONAL
J1
49.9Ω
R47
U
V
CC
CC3
IF
IN
C31
1µF
– 1.19V at much reduced current.
J3
U
6
22nF
C43
C37
0.1µF
3.09k
R48
LT1818CS
7
4
MINI-CIRCUITS
T1,
U3
JTX-4-10T
1
C32
1pF
Figure 6. Evaluation Circuit Schematic with I/Q Output Buffers
1:4,TR-R
+
–
V
W
6
3
2
CTRL
V
CC1
C1
5.6pF
R50
2k
100Ω
C22
1µF
R51
R49
2k
1
2
3
4
3.09k
R45
R46
1k
GND
IF
IF
GND
CC
+
–
U
0.1µF
0.1µF
C35
4.7µF
C34
C33
– 1.19V.
C16
1nF
I
I
OUT
OUT
V
CC
16
5
+
+
C25
1.5pF
I
I
V
OUT
OUT
CTRL
LT5546
15
6
U1
–
–
Q
Q
DET
OUT
OUT
IF
14
7
+
+
Q
Q
V
OUT
OUT
CC
4.7µF
13
8
0.1µF
0.1µF
C36
C27
C28
–
–
2XLO
2XLO
C15
1nF
C26
1.8pF
Table 2. The Logic of Different Operating Modes
EN
Low
Low
High
large charging time constants. Table 2 shows the logic of
the EN pin and STBY pin. In both normal operating mode
and standby mode, the maximum discharging current is
about 300µA, and the maximum charging current is more
than 4mA. In Figure 5 the simplified circuit schematic of
the STBY (or EN) input is shown.
STBY
EN
3.09k
17
R41
R39
OVERLOAD
+
–
1k
R42
NOTE: OUTPUT BUFFERS U2 AND U3 WITH ASSOCIATED
COMPONENTS ARE INCLUDED FOR EVALUATION ONLY.
DEMO BOARD: DC696A
C43, C45, C22, R51, C25, C26 AND C39 ARE OPTIONAL
2k
12
11
10
9
I CHANNEL (OR
GND
DIFFERENTIAL
Q CHANNEL):
Figure 5. Simplified Circuit Schematic of I Channel
(or Q Channel) Outputs and STBY (or EN) Input
5.6pF
FROM LPF
C2
SIGNALS
R43
2k
R52
240Ω
V
CC
3
2
300µA
MINI-CIRCUITS
T2,
+
–
JTX-4-10T
LT1818CS
6
C29
1pF
1:4, TR-R
U2
STBY
Low
High
Low or High
300µA
4
7
1
3.09k
R40
1 = EN
2 = STBY
22nF
SW1
6
C45
5V
C30
1µF
C38
0.1µF
J4
49.9Ω
R44
2XLO
I
(OR Q
I
(OR Q
OUT
OUT
+
–
J2
OUT
OUT
(OR EN)
R36
20k
R35
C39
STBY
20k
1µF
+
–
Q
)
)
OUT
Comments
Shutdown Mode
Standby Mode
Normal Operation Mode
V
5546 F04
CC2
V
22k
CC
5546 F05
5546fa