nlasb3157 ON Semiconductor, nlasb3157 Datasheet
nlasb3157
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nlasb3157 Summary of contents
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... NLASB3157 SPDT Switch ON The NLASB3157 is an advanced CMOS analog switch fabricated with silicon gate CMOS technology. It achieves very low propagation delay and RDS resistances while maintaining CMOS ON low power dissipation. Analog and digital voltages that may vary across the full power−supply range (from drop in replacement for the NC7SB3157 ...
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... Select Input Voltage Switch Input Voltage Output Voltage Operating Temperature Input Rise and Fall Time Control Input V = 2.3 V−3 Control Input V = 4.5 V−5 Thermal Resistance 2. Select input must be held HIGH or LOW, it must not float. NLASB3157 6 Select GND ...
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... Parameter is characterized but not tested in production max − R min measured at identical Flatness is defined as the difference between the maximum and minimum value of On Resistance over the specified range of conditions. 7. Guaranteed by Design. NLASB3157 (V) Min 1.65−1.95 2.3−5.5 1.65−1.95 2.3−5.5 v 5.5 V 0− ...
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... Resistance of the switch and the 50 pF load capacitance, when driven by an ideal voltage source (zero output impedance). 10. Off Isolation = 20 log [ 11 +25° MHz, Capacitance is characterized but not tested in production. A NLASB3157 T = +255C (V) Min 1.65−1.95 2.3−2.7 3.0−3.6 4.5− ...
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... B Ports). 13. Flatness is defined as the difference between the maximum and minimum value of On Resistance over the specified range of conditions. 14. Guaranteed by Design. * For OIRR, Xtalk, BW, THD, and CIN see −405C to 855C section. ON FLAT NLASB3157 V CC (V) Min Test Conditions 1.65−1.95 2.3−5.5 1.65− ...
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... This parameter is guaranteed by design but not tested. The bus switch contributes no propagation delay other than the RC delay of the On Resistance of the switch and the 50 pF load capacitance, when driven by an ideal voltage source (zero output impedance). * For OIRR, Xtalk, BW, THD, and CIN see −405C to 855C section. ON FLAT NLASB3157 T = +255C (V) ...
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... PLH PHL OUTPUT 50 LOGIC INPUT Figure 4. Break Before Make Interval Timing NLASB3157 AC LOADING AND WAVEFORMS FROM OUTPUT UNDER TEST Figure 2. AC Test Circuit 2.5 ns SELECT f V INPUT CC GND OUTPUT OUTPUT Figure 3 ...
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... Analyzer GND 50 W Figure 6. Off Isolation Capacitance S Meter MHz B N GND Figure 8. Channel Off Capacitance Signal Generator 0 dBm NLASB3157 LOGIC OFF V OUT INPUT OUT 1 MW 100 pF Figure 5. Charge Injection Test 10 nF Signal Generator 0 dBm LOGIC INPUT ...
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... 0.40 0.0157 *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. NLASB3157 PACKAGE DIMENSIONS SC−88/SOT−363/SC−70 DF SUFFIX CASE 419B−02 ISSUE W NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. ...
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... COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS THE TERMINALS. MILLIMETERS DIM MIN MAX A 0.70 0.80 A1 0.00 0.05 A3 0.20 REF b 0.15 0.25 D 1.00 BSC E 1.20 BSC e 0.40 BSC L 0.30 0.40 L2 0.40 0.50 MOUNTING FOOTPRINT 0.42 0.22 1.07 DIMENSIONS: MILLIMETERS ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative NLASB3157/D ...