cbtl04082a NXP Semiconductors, cbtl04082a Datasheet - Page 4

• Manufacturer Part Number: cbtl04082a
• Description: Cbtl04082a; Cbtl04082b 3.3 V, 4 Differential Channel, 2 1 Multiplexer/demultiplexer Switch For Pci Express Gen2
• Manufacturer: NXP Semiconductors

NXP Semiconductors
Table 2.
[1]
CBTL04082A_CBTL04082B
Product data sheet
Symbol
B0_P
B0_N
B1_P
B1_N
B2_P
B2_N
B3_P
B3_N
C0_P
C0_N
C1_P
C1_N
C2_P
C2_N
C3_P
C3_N
SEL
XSD01
XSD23
V
GND
n.c.
DD
HVQFN42 package die supply ground is connected to both GND pins and exposed center pad. GND pins and the exposed center pad
must be connected to supply ground for proper device operation. For enhanced thermal, electrical, and board level performance, the
exposed pad needs to be soldered to the board using a corresponding thermal pad on the board and for proper heat conduction through
the board, thermal vias need to be incorporated in the printed-circuit board in the thermal pad region.
[1]
Pin
CBTL04082A
38
37
36
35
29
28
27
26
34
33
32
31
25
24
23
22
9
41
19
5, 13, 20, 30,
40, 42
1, 4, 10, 14,
17, 21, 39,
center pad
8, 18
Pin description
CBTL04082B
37
36
33
32
28
27
24
23
3
4
7
8
12
13
16
17
30
40
20
9, 19, 21, 26,
31, 34, 41
18, 22, 25, 29,
35, 38, 42,
center pad
39
…continued
All information provided in this document is subject to legal disclaimers.
3.3 V, 4 differential channel, 2 : 1 MUX/deMUX switch for PCIe Gen2
Type
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
CMOS
single-ended
input
CMOS
single-ended
input
CMOS
single-ended
input
power
power
-
Rev. 1 — 28 February 2011
CBTL04082A; CBTL04082B
Description
channel 0, port B differential signal input/output
channel 1, port B differential signal input/output
channel 2, port B differential signal input/output
channel 3, port B differential signal input/output
channel 0, port C differential signal input/output
channel 1, port C differential signal input/output
channel 2, port C differential signal input/output
channel 3, port C differential signal input/output
operation mode select
Shutdown pin; should be driven LOW or connected to GND for
normal operation. When HIGH, channel 0 and channel 1 are
switched off (non-conducting high-impedance state), and
supply current consumption is minimized.
Shutdown pin; should be driven LOW or connected to GND for
normal operation. When HIGH, channel 2 and channel 3 are
switched off (non-conducting high-impedance state), and
supply current consumption is minimized.
positive supply voltage, 3.3 V (±10 %)
supply ground
not connected; these pins can be connected to any signal
externally
SEL = LOW: A ↔ B
SEL = HIGH: A ↔ C
© NXP B.V. 2011. All rights reserved.
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