adg796a Analog Devices, Inc., adg796a Datasheet - Page 8

• Manufacturer Part Number: adg796a
• Description: I2c-compatible, Wide Bandwidth, Hex 2 1 Multiplexer
• Manufacturer: Analog Devices, Inc.

ADG796A
Parameter
t
t
t
1
2
Timing Diagram
11A
12
SP
Guaranteed by initial characterization. C
A device must provide a data hold time for SDA in order to bridge the undefined region of the SCL falling edge.
1
Conditions
Standard mode
Fast mode
High speed mode
Standard mode
Fast mode
High speed mode
Fast mode
High speed mode
C
C
SDA
C
C
SCL
B
B
B
B
= 100 pF max
= 400 pF max
= 100 pF max
= 400 pF max
P
t
7
S
B
refers to capacitive load on the bus line, tr and tf measured between 0.3 VDD and 0.7 VDD.
t
6
t
Min
20 + 0.1 C
10
20
20 + 0.1 C
10
20
0
0
2
t
4
t
11
Figure 2. Timing Diagram for 2-Wire Serial Interface
B
B
Max
1000
300
80
160
300
300
40
80
50
10
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
t
Rev. 0 | Page 8 of 24
3
t
1
t
12
Description
t
an acknowledge bit
t
Pulse width of suppressed spike
RCL1
FCL
, fall time of SCL signal
, rise time of SCL signal after a repeated start condition and after
S
t
t
5
10
t
6
t
8
P
t
9