sak-xc2387a-56fxxl Infineon Technologies Corporation, sak-xc2387a-56fxxl Datasheet - Page 51
sak-xc2387a-56fxxl
Manufacturer Part Number
sak-xc2387a-56fxxl
Description
16/32-bit Single-chip Microcontroller With 32-bit Performance
Manufacturer
Infineon Technologies Corporation
Datasheet
1.SAK-XC2387A-56FXXL.pdf
(137 pages)
- Current page: 51 of 137
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3.3
The core of the CPU consists of a 5-stage execution pipeline with a 2-stage instruction-
fetch pipeline, a 16-bit arithmetic and logic unit (ALU), a 32-bit/40-bit multiply and
accumulate unit (MAC), a register-file providing three register banks, and dedicated
SFRs. The ALU features a multiply-and-divide unit, a bit-mask generator, and a barrel
shifter.
Figure 4
Data Sheet
CPU
MAC
Prefetch
Multiply
Branch
FIFO
IDX0
IDX1
MAH
QX0
QX1
Unit
Unit
Unit
+/-
+/-
Central Processing Unit (CPU)
CPU Block Diagram
CSP
CPUCON1
CPUCON2
Return
MRW
MCW
MSW
MAL
Stack
QR0
QR1
+/-
IP
IFU
Division Unit
Multiply Unit
ZEROS
DPP0
DPP1
DPP2
DPP3
PSW
MDC
MDH
Exception
Injection/
VECSEG
Handler
XC2000 Family Derivatives / Base Line
TFR
Bit-Mask-Gen.
Barrel-Shifter
51
SPSEG
STKOV
STKUN
ONES
MDL
SP
+/-
ADU
ALU
RF
DMU
PMU
GPRs
2-Stage
R15
R14
5-Stage
GPRs
R1
R0
Buffer
R15
R14
Prefetch
R1
R0
Pipeline
CP
GPRs
R15
R14
Pipeline
R1
R0
IPIP
WB
Functional Description
XC2385A, XC2387A
Peripherals
Flash/ROM
mca04917_x.vsd
PSRAM
DPRAM
DSRAM
V2.0, 2009-03
EBC
GPRs
R15
R14
R1
R0
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