ip4778cz38/v NXP Semiconductors, ip4778cz38/v Datasheet - Page 13

• Manufacturer Part Number: ip4778cz38/v
• Description: Hdmi Esd Protection, Ddc Buffering And Hot Plug Control
• Manufacturer: NXP Semiconductors

NXP Semiconductors
10. Application information
IP4778CZ38_1
Objective data sheet
Fig 7.
DDC_CLK_OUT
a. DDC clock
DDC circuit
TMDS_BIAS
10.1 TMDS
10.2 DDC circuit
To protect the TMDS lines and also to comply with the impedance requirements of the
HDMI specification, the IP4778CZ38 provides ESD protection with a low capacitive load.
The dominant value for the TMDS line impedance is the capacitive load to ground. The
IP4778CZ38 has a capacitive load of only 0.7 pF.
The DDC bus circuit contains full capacitive decoupling between the HDMI connector and
the DDC bus lines on the PCB. The capacitive decoupling ensures that the maximum
capacitive load is within the 50 pF maximum of the HDMI specification.
The slew rate accelerator supports high capacitive load on the HDMI cable side. Various
HDMI cable suppliers produce low-cost and long (typically 25 m) HDMI cables with a
capacitive load of up to 6 nF.
The slew rate accelerator boosts the DDC signal independent of which side of the bus is
releasing the signal. The DDC module provides a level shifting and a multiplex option
which is enabled by the ENABLE signal.
Fig 6.
ACCELERATOR
TMDS_D2+
SLEW
RATE
V
CC(5V0)
ESD protection of TMDS lines
001aag040
TMDS_D2
ENABLE
DDC_CLK_IN
TMDS_D1+
Rev. 01 — 10 April 2008
TMDS_D1
HDMI ESD protection, DDC buffering and hot plug control
TMDS_BIAS
DDC_DAT_OUT
TMDS_GND
b. DDC data
TMDS_BIAS
TMDS_D0+
TMDS_D0
ACCELERATOR
SLEW
RATE
TMDS_CLK+
V
IP4778CZ38
CC(5V0)
001aag041
TMDS_CLK
© NXP B.V. 2008. All rights reserved.
ENABLE
DDC_DAT_IN
001aag039
V
CC(5V0)
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