pxb4340e Infineon Technologies Corporation, pxb4340e Datasheet - Page 78

• Manufacturer Part Number: pxb4340e
• Description: Atm Oam Processor Aop
• Manufacturer: Infineon Technologies Corporation

Read/write Address B8
Value after reset 0275
Data Sheet
DMAEN
MODE
INDEX(2:0)
MAXTS(1:0)
MAXTR(3:0)
CCDEFMAX(3:0)
MAXTR(3:0)
H
Enable MPDREQ output signal:
0
1
Selects standard DMA or compressed DMA
0
1
Selects which word (0..7) in the LCI table is object of the RMW
operation of standard DMA. INDEX is don’t care in compressed mode
(MODE=1).
Time for generation of CC cells if no user cell has arrived in the CC
generation. Counted in multiples of SCAN cycles (typ. 500 ms).
Time for transition from normal operation to LOC defect state in the CC
evaluation. Counted in multiples of SCAN cycles (typ. 500 ms).
Time for transition from LOC defect to LOC failure state in the CC
evaluation. Counted in multiples of SCAN cycles (typ. 500 ms).
H
Unused
MPDREQ is always tristate and MPDACK is not
evaluated.
MPDREQ gets low impedance if DMA is requested,
otherwise tristate. MPDREQ is MPDACK controlled.
Standard DMA: 32 bit RMW operation on Dword of LCI
entry selected with INDEX(2:0) using DWDR and DMR.
Compressed DMA: 32 bit RMW operation on all interrupt
relevant flags in LCI entry, no influence of DWDR, for bit
mapping see
3-78
4.1.6.1.
CCDEFMAX(3:0)
MAXTS(1:0)
04.2000