ncn6000 ON Semiconductor, ncn6000 Datasheet - Page 26

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ncn6000

Manufacturer Part Number
ncn6000
Description
Compact Smart Card Interface Ic
Manufacturer
ON Semiconductor
Datasheet

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highlights the delay coming from the internal clock duty
cycle resynchronization. In this example, the clock is
internally divided by 2 prior to be applied to the CRD_CLK
pin. Since the clock signal is asynchronous, it is up to the
programmer to make sure the next card transaction is not
of the circuit, whatever be the new clock divider ratio. In
The example given by the oscillogram here above
The clock can be re−programmed without halting the rest
Figure 25. Clock Programming Examples
http://onsemi.com
NCN6000
26
activated before the CRD_CLK signal has been updated.
Generally speaking, such a delay can be derived from the
maximum clock frequency provided to the interface,
keeping in mind the maximum delay is eight incoming clock
pulses.
particular, the CRD_VCC can be applied to the card while
the clock is re−programmed.

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