ncn6000 ON Semiconductor, ncn6000 Datasheet - Page 19

• Manufacturer Part Number: ncn6000
• Description: Compact Smart Card Interface Ic
• Manufacturer: ON Semiconductor

Card Detection
resistor to bias the CRD_DET pin, yielding a logic High
when the pin is left open (assuming a NO switch). The
internal logic associated with pin 11 provides an automatic
selection of the slope card detection, depending upon the
polarity set by the external MPU. At start up, the CRD_DET
is preset to cope with Normally Open switch. When a
Normally Close switch is used in the card socket, it is
mandatory to program the NCN6000 chip during the
initialization sequence, otherwise the system will not start if
a card was previously inserted. Table 3 gives the
programming code for such a function. The next lines
provide a typical assembler source to handle this CRD_DET
Normally Close polarity:
during the Program Mode sequence (PGM = L), but,
generally speaking, is useless since the switch does not
change during the usage of the considered module. On the
other hand, the card detection switch shall be connected
across pin 11 and ground, for any polarity selected.
Smart EQU $20
The card detector circuit provides a 500 kW pull up
The CRD_DET polarity can be updated at any time,
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LDAA #$09
STAA smart, X
; NCN6000 Physical CS Address
; Offset
; I/O = H, A0 = A1 = L, RESET = H
; Set CRD_DET = Normally Closed
Switch
Figure 11. Card Insertion Detection and Interrupt Signals
Chip Select Acknowledge or Clear Interrupt
Digital Filter Delay
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NCN6000
19
filtered out by the internal digital filter circuit, avoiding false
interrupt. In addition to the minimum internal 50 ms timing,
the MPU shall provide an additional delay to cope with the
mechanical stabilization of the card interface (typically
3 ms), prior to valid the CRD_VCC supply.
INT = Low as depicted before. When the NCN6000 detects
a card extraction, the power down sequence is activated,
regardless of the PWR_ON state, and the INT pin is asserted
Low. It is up to the external MPU to clear this interrupt by
forcing a chip select pulse as depicted in Figure 5.
NCN6000 chip being used for the characterization. Any
pulse shorter than this delay does not generate an interrupt.
However, to guarantee an interrupt will be generated, the
CRD_DET signal must be longer than 150 ms as defined by
the specification.
microcontroller, the minimum pulse width being 2 ms to
make sure the card is detected.
Normally Open switch, the delay existing between the
interrupt negative going state and the CS being Low comes
from the particular software latency existing in this
particular MPU.
The transition presents pin 11, whatever be the polarity, is
When a card is inserted, the detector circuit asserts
The 75 ms delay represent the digital filter built−in the
The Chip Select pulse is generated by the external
The oscillogram, Figure 11, depicts the behavior for a
INTERRUPT