pi2eqx5864 Pericom Semiconductor Corporation, pi2eqx5864 Datasheet - Page 10

• Manufacturer Part Number: pi2eqx5864
• Description: 5.0gbps 4-lane Pcie Gen2 Redriver With I2c Control
• Manufacturer: Pericom Semiconductor Corporation

The A-Channels Equalizer and Output Control register is used to control the confi guration of the input equalizer and output emphasis
and levels of the four A channels. These register bits are loaded from the input confi guration pins of the same name at power-on.
These bits may be changed if the MODE# input is set to allow I2C confi guration. Please refer to the tables (1) Equalizer Confi gura-
tion, (2) Output Swing Confi guration and (3) Output Emphasis Confi guration earlier in this document for setting information. All
four A channels get the same confi guration settings.
BYTE 9 - B-Channels Equalizer and Output Control (BEOC)
SELx_B: Equalizer confi guration, Dx_B: Emphasis control, Sx_B: Output level control (see Confi guration Table)
Note: R=Read only, W=Write only, R/W=Read and Write, X=Undefi ned, rsvd=reserved for future use
The B-Channels Equalizer and Output Control register is used to control the confi guration of the input equalizer and output emphasis
and levels of the four B channels. These register bits are loaded from the input confi guration pins of the same name at power-on.
These bits may be changed if the MODE# input is set to allow I2C confi guration. Please refer to the tables (1) Equalizer Confi gura-
tion, (2) Output Swing Confi guration and (3) Output Emphasis Confi guration earlier in this document for setting information. All
four B channels get the same confi guration settings.
BYTE 10 - Reserved
BYTE 11 - Reserved
Reserved Bytes 10 and 11 are also visible via the I2C interface. These bytes are R/W, are initialized to 0 at power up, are used for IC
manufacturing test purposes and should not be changed for normal operation.
Start & Stop Conditions
A HIGH to LOW transition on the SDA line while SCL is HIGH indicates a START condition. A LOW to HIGH transition on the
SDA line while SCL is HIGH defi nes a STOP condition, as shown in the fi gure below.
Power-on
Name
State
Type
Bit
07-0277
SEL0_B
R/W
7
1
SEL1_B
R/W
6
1
SEL2_B
I C
2
R/W
5
1
D0_B
R/W
10
4
1
5.0Gbps 4-Lane PCI Express GenII Re-Driver
with Equalization, Emphasis and I
D1_B
R/W
3
1
D2_B
R/W
2
1
S0_B
R/W
1
1
PS8934A
PI2EQX5864
2
C Control
S1_B
R/W
0
1
01/21/08