x96011 Intersil Corporation, x96011 Datasheet - Page 12

• Manufacturer Part Number: x96011
• Description: Temperature Sensor With Look Up Table Memory And Dac
• Manufacturer: Intersil Corporation

Control Register 1
This register is accessed by performing a Read or Write
operation to address 81h of memory. This byte’s volatility
is determined by bit NV13 in Control register 0.
LDA5 - LDA0: LUT D
When bit LDAS (bit 4 in Control register 5) is set to “1”,
the LUT is addressed by these six bits, and it is not
addressed by the output of the on-chip A/D converter.
When bit LDAS is set to “0”, these six bits are ignored
by the X96011. See Figure 7.
A value between 00h (00
ten to these register bits, to select the corresponding row
in the LUT. The written value is added to the base
address of the LUT (90h).
Control Register 3
This register is accessed by performing a Read or Write
operation to address 83h of memory. This byte’s volatility
is determined by bit NV13 in Control register 0.
DDA7 - DDA0: D/A D
When bit DDAS (bit 5 in Control register 5) is set to “1”,
the input to the D/A converter is the content of bits
DDA7 - DDA0, and it is not a row of LUT. When bit
DDAS is set to “0” (default) these eight bits are ignored
by the X96011. See Figure 6.
Control Register 5
This register is accessed by performing a Read or
Write operation to address 85h of memory.
IRECT
IRECT
10
12
) and 3Fh (63
A
A
CCESS
CCESS
B
B
10
ITS
ITS
) may be writ-
X96011
IFSO1 - IFSO0: C
O
These two bits are used to set the full scale output cur-
rent at the Current Generator pin, Iout, according to
the following table. The direction of this current is set
by bit IDS in Control register 0. See Figure 5.
LDAS: LUT D
VOLATILE
When bit LDAS is set to “0” (default), the LUT is
addressed by the output of the on-chip A/D converter.
When bit LDAS is set to “1”, LUT is addressed by bits
LDA5 - LDA0.
DDAS: D/A D
VOLATILE
When bit DDAS is set to “0” (default), the input to
the D/A converter is a row of the LUT. When bit
DDAS is set to “1”, that input is the content of the
Control register 3.
Control Register 6
This register is accessed by performing a Read or
Write operation to address 86h of memory.
I1FSO1
UTPUT
0
0
1
1
S
)
)
ET
I1FSO0
B
IRECT
IRECT
0
1
0
1
ITS
URRENT
(N
A
ON
A
I1 Full Scale Output Current
CCESS
CCESS
-
VOLATILE
G
Reserved (Don’t Use)
ENERATOR
±1.3 mA (Default)
S
S
ELECT
ELECT
±0.85 mA
±0.4mA
)
B
B
F
IT
ULL
IT
October 25, 2005
(N
(N
S
ON
ON
CALE
FN8215.1
-
-