tda5051at-c1 NXP Semiconductors, tda5051at-c1 Datasheet - Page 4

• Manufacturer Part Number: tda5051at-c1
• Description: Home Automation Modem
• Manufacturer: NXP Semiconductors

Philips Semiconductors
PINNING
FUNCTIONAL DESCRIPTION
Both transmission and reception stages are controlled
either by the master clock of the microcontroller or by the
on-chip reference oscillator connected to a crystal. This
ensures the accuracy of the transmission carrier and the
exact trimming of the digital filter, thus making the
performance totally independent of application
disturbances such as component spread, temperature,
supply drift and so on.
The interface with the power network is made by means of
an LC network (see Fig.18). The device includes a power
output stage that feeds a 120 dB V (RMS) signal on a
typical 30
To reduce power consumption, the IC is disabled by a
power-down input (pin PD): in this mode, the on-chip
oscillator remains active and the clock continues to be
supplied at pin CLK
reception mode, this pin can be dynamically controlled by
the microcontroller, see Section “Power-down mode”.
When the circuit is connected to an external clock
generator (see Fig.6), the clock signal must be applied at
pin OSC1 (pin 7); OSC2 (pin 8) must be left open-circuit.
Fig.7 shows the use of the on-chip clock circuit.
1999 May 31
DATA
DATA
V
CLK
DGND
SCANTEST
OSC1
OSC2
APGND
TX
V
AGND
V
RX
PD
TEST1
SYMBOL
DDD
DDAP
DDA
Home automation modem
OUT
IN
OUT
IN
OUT
load.
PIN
10
12
13
14
15
16
11
1
2
3
4
5
6
7
8
9
OUT
digital data input (active LOW)
digital data output (active LOW)
digital supply voltage
clock output
digital ground
test input (LOW in application)
oscillator input
oscillator output
analog ground for power amplifier
analog signal output
analog supply voltage for power
amplifier
analog ground
analog supply voltage
analog signal input
power-down input (active HIGH)
test input (HIGH in application)
. For low-power operation in
DESCRIPTION
4
All logic inputs and outputs are compatible with
TTL/CMOS levels, providing an easy connection to a
standard microcontroller I/O port.
The digital part of the IC is fully scan-testable. Two digital
inputs, SCANTEST and TEST1, are used for production
test: these pins must be left open-circuit in functional mode
(correct levels are internally defined by pull-up or
pull-down resistors).
Transmission mode
To provide strict stability with respect to environmental
conditions, the carrier frequency is generated by scanning
the ROM memory under the control of the microcontroller
clock or the reference frequency provided by the on-chip
oscillator. High frequency clocking rejects the aliasing
components to such an extent that they are filtered by the
coupling LC network and do not cause any significant
disturbance. The data modulation is applied through
pin DATA
to the carrier (shaping). Harmonic components are limited
in this process, thus avoiding unacceptable disturbance of
the transmission channel (according to CISPR16 and
EN50065-1 recommendations). A 55 dB Total Harmonic
Distortion (TDH) is reached when the typical LC coupling
network (or an equivalent filter) is used.
handbook, halfpage
SCANTEST
IN
DATA OUT
CLK OUT
and smoothly applied by specific digital circuits
DATA IN
DGND
V DDD
OSC1
OSC2
Fig.2 Pin configuration.
1
2
3
4
5
6
7
8
TDA5051AT
MGK833
16
15
14
13
12
11
10
9
Product specification
TEST1
PD
RX IN
V DDA
AGND
V DDAP
TX OUT
APGND
TDA5051A