tda5153x NXP Semiconductors, tda5153x Datasheet - Page 13

• Manufacturer Part Number: tda5153x
• Description: Pre-amplifier Hard Disk Drive With Mr-read/inductive Write Heads
• Manufacturer: NXP Semiconductors

Philips Semiconductors
8.10
8.10.1
d0
d1
d2
d3
d4
d5
8.10.2
By default d0 = d1 = logic 0, the pre-amplifier powers-up in
sleep mode. If d1 = logic 0, d0 = logic 1 or d1 = logic 1,
d0 = logic 0 the circuit goes in standby mode.
1997 Jul 02
By default (d0 = logic 0), write data passes from the
write data input via the data flip-flop to the write driver.
The write driver toggles the current in the head at the
falling edges of
When d0 = logic 1, the flip-flop is not used. The signal
polarity is non-inverting from WDIx and WDIy to Wx and
Wy.
By default (d1 = logic 0) the pre-amplifier senses PECL
write signals at WDIx and WDIy. d1 should remain
logic 0.
By default, (d2 = logic 0) the write current is inhibited
under low supply voltage conditions. The write current
inhibit is made inactive by programming d2 to logic 1.
By default (d3 = logic 0), in write mode low supply
voltage, open head, and other conditions are monitored
and flagged at HUS. If d3 = logic 1, HUS is LOW in write
mode and HIGH in read mode.
The amplifier read gain may be programmed in the
configuration register. By default (d4 = logic 0), the read
gain is typically 160 with R
read amplifier typical gain is 3 dB higher (i.e. 226 if
R
In order to minimize the write-to-read recovery times,
the first stage of the read amplifier may be kept biased
during write mode. By default, (d5 = logic 0) the read
amplifier is powered-down during write mode, and the
fast settling procedure is activated after write-to-read
switching. If d5 = logic 1 the read amplifier is kept biased
during write mode, and the fast settling procedure still
occurs if the head is changed or the MR current is
re-programmed.
Pre-amplifier for Hard Disk Drive (HDD)
with MR-read/inductive write heads
V
MR
data
Operation of the serial interface
= 28 ).
=
C
P
OWER CONTROL
ONFIGURATION
V
------------------------------------- -
WDIx
–
2
V
WDIy
MR
= 28 . If d4 = logic 1, the
13
If d1 = d0 = logic 1, the circuit goes in active mode, (read
or write mode depending on the R/W input).
8.10.3
d2, d1 and d0 are used to select head H0 to H5 for the
6 channel version and to select head H1 to H4 for the
4 channel version.
8.10.4
The circuit is prepared for servo writing. However, the chip
will not be guaranteed.
8.10.5
d2 = d1 = d0 = logic 0. The circuit is not in test mode. This
is the default situation.
8.10.5.1
d2 = logic 0, d1 = logic 0, d0 = logic 1. In read mode, the
voltages at Rx and Ry (at the top of the MR elements) of
the selected head are fed to RDx and RDy outputs. By
measuring the output voltages single-ended at two
different I
measured according to the following formula:
Open head and head short-circuited to ground conditions
can therefore be detected.
d2 = logic 0, d1 = logic 1, d0 = logic 0. Same as before,
with the difference that I
value of 5 mA. Measuring in the same way as above with
I
connected together.
8.10.5.2
d2 = logic 0, d1 = logic 1, d0 = logic 1. The temperature
monitor voltages are connected to RDx and RDy. The
output differential voltage depends on the temperature
according to:
The temperature may be measured with a typical precision
of 5 C.
R
MR1
MRx
> 5 mA, enables the detection of MR elements
=
H
S
T
MR
V
-------------------------------------- -
I
ERVO WRITE
EST
EAD SELECT
MRx1
RDx1
MR head test
Temperature monitor
currents, the MR resistance can be accurately
dV
–
–
V
I
=
MRx2
RDx2
–
0.00364
MR2
for the x side for instance.
is fixed to a minimum constant
T
Preliminary specification
+
1.7
,
TDA5153
0 T 140 C