saa6703ah NXP Semiconductors, saa6703ah Datasheet - Page 5
saa6703ah
Manufacturer Part Number
saa6703ah
Description
Xga Analog Input Flat Panel Controller.
Manufacturer
NXP Semiconductors
Datasheet
1.SAA6703AH.pdf
(97 pages)
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V
SSA(BIAS)(SOG)
AGCANA
V
HSYNC
VSYNC
REF_G
REF_R
SOGIN
REF_B
DDA(IB)
RBIAS
VCLK
CLK
RIN
GIN
BIN
V
SSA(BIAS)(B)
135
160
141
140
11
13
10
47
4
15
22
20
2
9
8
n.c.
1
27, 28, 30, 31,
33, 34, 36, 40,
136, 137, 148
V
SSA(BIAS)(G)
GREEN
SLICER
3
SYNC-
syncs
ON-
ADC
12
V
SSA(BIAS)(R)
RESERVED1 to
RESERVED8
CLOCK GENERATOR:
SAMPLE CLOCK PLL
PANEL CLOCK PLL
19
V
RGB data
3
PHASE SHIFT
RGB data
3
DDA(ADC)(B)
37, 43, 44,
128, 129, 130,
133, 134
8-bit
8-bit
syncs
3
AND CSYNC
SELECTION
DECODER
V
DDA(ADC)(G)
SYNC
INTERFACE
V
V
INPUT
SSD(EP1)
14
SSD(EP10)
V
DDA(ADC)(R)
48, 56, 66, 78,
88, 100, 112,
124, 131, 142
21
to
V
RGB data
3
SSA(ADC)(B)
sample clock
syncs
panel clock
8-bit
5
V
V
V
DDD(EP1)
SSA(ADC)(G)
DDD(EP10)
SCALER
DOWN-
ADJUSTMENT
DETECTION
OSD
49, 57, 67, 79,
89, 101, 113,
125, 132, 143
16
Fig.1 Block diagram.
V
AUTO-
MODE
SSA(ADC)(R)
to
23
LOOK-UP
DECOUPLING
COLOUR
TABLE
CSG2/A0
FIFO
V
55
DDA(EP)
CSG4/A1
INTERFACE
configuration
I
159
2
RGB data
3
C-BUS
127
data
10-bit
V
SCL
SAA6703AH
SSA(EP)
42
158
SDA
UPSCALER
DITHERING
V
41
SS(PLL)(P)
TRST
146
153
V
DD(PLL)(P)
TCK
RGB data
3
3
INTERFACE
154
test control
147
6-bit or
8-bit
signals
JTAG
V
TMS
SSA(PLL)(S)
156
TDI
149
INTERFACE
155
V
OUTPUT
control signals
DDA(PLL)(S)
CONTROL
TDO
UNIT
157
150
V
DDD(PLL)(S)
RST
RGB data
3
3
RGB data
3
3
panel control
signals
51
152
6-bit or
8-bit
6-bit or
8-bit
INT
V
50
SSD(PLL)(S)
53, 54, 126
104 to 111,
151
26, 32, 38,
46, 71, 91,
29, 35, 39,
45, 70, 90,
114 to 121
103, 123,
102, 122,
138, 139
58 to 65,
72 to 77,
92 to 99,
80 to 87
68, 69,
145
144
17
24
18
25
52
6
7
mhc689
V
V
PCLK
CSG0, CSG1,
CSG3
OUTEN, PWM
PA0 to PA7,
PB0 to PB7,
PC0 to PC7
PD0 to PD7,
PE0 to PE7,
PF0 to PF7
V
V
V
V
V
V
V
V
DDA(B)
DDA(G)
DDA(R)
SSA(B)
SSA(G)
SSA(R)
DDD(IC1)
SSD(IC1)
DDD(IC9)
SSD(IC9)
to
to
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