saa6703h NXP Semiconductors, saa6703h Datasheet - Page 43

• Manufacturer Part Number: saa6703h
• Description: Xga Dual Input Flat Panel Controller.
• Manufacturer: NXP Semiconductors

Philips Semiconductors
7.5.2
The hsync regeneration reproduces a regular hsync, e.g.
in case of equalizing pulses or an absent hsync during
vsync. The input selection is shown in Table 23.
Table 23 Hsync regeneration input selection
7.5.3
The source signals of the line-locked PLL are selected
according to Table 24 as either HSYNC and VSYNC from
the input pins or the composite sync decoder outputs
HS_CS and VS_CS.
Table 24 Line-locked PLL sync selection
2004 Apr 01
handbook, full pagewidth
hs_regen_in_en
iif_cs_sog_en
XGA dual input flat panel controller
H
S
0
1
0
1
hsync
vsync
csync-1
csync-2
csync-3
csync-4
csync-5
ELECTION OF SYNCS FOR LINE
SYNC REGENERATION
HS_CS
HSYNC
HSYNC
HS_CS
HS_PLL
HS_REGEN
-
Fig.9 Supported composite sync modes.
LOCKED
VSYNC
VS_CS
VS_PLL
PLL
43
7.5.4
The output selection for input interface and mode
detection allows to choose between the input signals
HSYNC and VSYNC, composite sync decoder outputs
HS_CS and VS_CS and the syncs decoded from the DVI
input HS_DVI and VS_DVI. The regenerated hsync
HS_REGEN can be selected as source
(see Tables 25 and 26).
Table 25 Mode detection sync selection; note 1
Note
1. X = don’t care.
mdd_cs_
sog_en
0
0
1
1
S
INPUT INTERFACE
ELECTION OF SYNCS FOR MODE DETECTION AND
dvi_on
mdd_
X
X
0
1
regen_on
mdd_hs_
X
X
0
1
HSYNC
HS_DVI
HS_CS
HS_REGEN
HS_MDD
Product specification
SAA6703H
MHC217
VS_MDD
VSYNC
VS_DVI
VS_CS