z86230 ZiLOG Semiconductor, z86230 Datasheet - Page 34

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z86230

Manufacturer Part Number
z86230
Description
Advanced Violence Blocking And Ntsc Line 21 Xds
Manufacturer
ZiLOG Semiconductor
Datasheet

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6.1.16 Blocking Control Register 2
34
C
ONTROL
T
D
rated according to the Canadian French Language Ratings standards, and this bit
is set to High.
D
G-rated according to the Canadian French Language Ratings standards, and this
bit is set to High.
D
8ans+-rated in Canadian French Language Ratings standards, and this bit is set to
High.
D
13ans+-rated in Canadian French Language Ratings standards, and this bit is set
to High.
D
16ans+-rated in Canadian French Language Ratings standards, and this bit is set
to High.
D
gram is 18ans+-rated according to the Canadian French Language Ratings and
this bit is set to High.
D
N
video program possesses the corresponding Canadian French Language Rating. The
device outputs High onto pin 13 only when a bit is set to High and it recovers the corre-
sponding Canadian French Language Rating in the incoming video program.
T
D
has No Rating and this bit is set to Low. Setting this bit to High disables blocking
on No Rating.
Bit
R/W
Bit
R/W
ABLE
ABLE
R
0
1
2
3
4
5
6
OTE
0
-E.
-G.
-8ans+.
-13ans+.
-16ans+.
-18ans+.
-D
-BNR.
EGISTERS
:
7
The Z86230 outputs High on pin 13 when the incoming video program is E-
-Res.
The Z86230 outputs High on pin 13 when the incoming video program is
The Z86230 outputs Low when a bit in this register is set to Low and the incoming
26. C
27. B
The Z86230 outputs High on pin 13 when the incoming video program
The Z86230 outputs High on pin 13 when incoming video program is
Reserved. These bits must be kept Low(0).
The Z86230 outputs High on pin 13 when incoming video program is
The Z86230 outputs High on pin 13 when incoming video program is
The Z86230 outputs High on pin 13 when the incoming video pro-
ONTENT
LOCKING
Z86230—PRELIMINARY
res
res
R
7
R
7
A
C
DVISORY
ONTROL
res
res
R
6
R
6
18ans+ 16ans+ 13ans+ 8ans+
R
R
R/W
EGISTER
ATINGS
res
5
R
5
S
2 (A
R/W
ELECT
res
4
R
4
DDRESS
R
EGISTER
R/W
res
3
3
R
= 11A
6 (A
R/W
res
H
2
R
2
)
PS000400-TVC0499
DDRESS
R
EGISTERS
R/W
res
G
R
1
1
= 10h)
S
UMMARY
BNR
R/W
R/W
0
E
0

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