z86230 ZiLOG Semiconductor, z86230 Datasheet - Page 19

• Manufacturer Part Number: z86230
• Description: Advanced Violence Blocking And Ntsc Line 21 Xds
• Manufacturer: ZiLOG Semiconductor

4.1.3 Writing to the I
PS000400-TVC0499
2
C Bus
I
Acknowledge.
edge after the reception of each byte. The master device must generate the clock
for the Acknowledge bit. Acknowledge is
is
Data.
SCLK
edge of
Communication with the Z86230 is initiated when the master device sends the
Z86230 slave address following a
single, seven-bit slave address. The Z86230 responds with an Acknowledge. The
eighth bit of the slave address is driven High for
WRITE
Commands and data are written to the Z86230 using the I
device is enabled when an
WRITE
the receipt of an
may be sent after the device is
1 or 2 bytes in length. The device executes the commands in order of receipt.
Overflowing the 32 byte buffer causes improper operation. The
Serial Status Register (
mand buffer for at least 2 bytes of command data. The Status register data is out-
put immediately following the receipt of the Slave Address
The first byte of a 2-byte command is always written first. The master’s sequence
for writing a 2-byte command, followed by a 1-byte command is displayed in the
following example:
2
C B
SDA = High
Start
Slave_Address_Write/Slave ACK
CMD1_Write/Slave ACK
DATA1_Write/Slave ACK
CMD2_Write/Slave ACK
Stop
US
,
The data (
MSB
O
byte, is received. A
operations.
SCLK
PERATION
first. The receiving device interprets the data,
.
.
When addressed, the receiving device must output an Acknowl-
Z86230—PRELIMINARY
SDA
I
2
C STOP
) is output by the transmitting device on the falling edge of
SSR
I
WRITE
condition. Any number of command bytes, up to 32,
2
) may be read to determine if there is room in the com-
C START
WRITE
START
operation is ended and the bus is disabled upon
-enabled. Each of these commands is either
condition, followed by its Slave Address
SDA = Low
condition. The Z86230 has a preset,
S
ERIAL
READ
C
. Not Acknowledge (
OMMUNICATIONS
operations and Low for
2
MSB
C bus interface. The
READ
first, on the rising
RDY
.
bit of the
I
NTERFACE
NACK
19
)