adm12914-2arqz-rl7 Analog Devices, Inc., adm12914-2arqz-rl7 Datasheet - Page 5

• Manufacturer Part Number: adm12914-2arqz-rl7
• Description: ?0.8% Accurate Quad Uv/ov Positive/negative Voltage Supervisor
• Manufacturer: Analog Devices, Inc.

Preliminary Technical Data
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
Table 4. Pin Function Descriptions
ADM12914-1
1, 3
2, 4
5, 7
6, 8
9
10
11
12
13
N/A
14
1
Pin No.
Figure 2. ADM12914-1 Pin Configuration
VH1
VH2
VH3
VH4
VL1
VL2
VL3
VL4
ADM12914-2
1, 3
2, 4
5, 7
6, 8
9
10
11
12
N/A
13
14
1
1
2
3
4
5
6
7
8
ADM12914-1
(Not to Scale)
TOP VIEW
Mnemonic
VH1, VH2
VL1, VL2
VH3, VH4
VL3, VL4
GND
REF
OV
UV
LATCH
DIS
SEL
16
15
14
13
12
11
10
9
V
TIMER
SEL
LATCH
UV
OV
REF
GND
CC
Description
Voltage High Input 1 and Voltage High Input 2. If the voltage monitored by VH1 or VH2 drops
below 0.5 V an undervoltage condition is detected. Connect to V
Voltage Low Input 1. If the voltage monitored by VL1 or VL2 rises above 0.5 V an overvoltage
condition is detected. Tie to GND when not in use.
Voltage High Input 3 and Voltage High Input 4. The polarity of these inputs is determined by the
state of the SEL pin (see Table 5). When the monitored input is configured as a positive voltage, if
the voltage monitored by VH3 and VH4 drops below 0.5 V, an undervoltage condition is
detected. Conversely, when the input is configured as a negative voltage, if the input drops
below 0.5 V an overvoltage condition is detected. Connect to V
Voltage Low Input 3 and Voltage Low Input 4. The polarity of these input is determined by the
state of the SEL pin (see Table 5). When the monitored input is configured as a positive voltage, if
the voltage monitored by VL3 or VL4 rises above 0.5 V, an overvoltage condition is detected.
Conversely, when the input is configured as a negative voltage, if the input rises above 0.5 V an
undervoltage condition is detected. Tie to GND when not in use.
Device Ground.
Buffered Reference Output. This pin is a 1 V reference that is used as an offset when monitoring
negative voltages. This pin can source or sink 1 mA, and drive loads up to 1 nF. Larger capacitive
loads may lead to instability. Leave unconnected when not in use.
Overvoltage Reset Output. OV asserts low if a negative polarity input voltage drops below its
associated threshold, or if a positive polarity input voltage exceeds its threshold. The ADM12914­
1 allows OV to be latched low. The ADM12914-2 holdsOV low for a period determined by the
TIMER capacitor. This pin has a weak pull-up to V
this pin unconnected when not in use.
Undervoltage Reset Output. UV asserts low if a negative polarity input voltage exceeds its
associated threshold or if a positive polarity input voltage drops below its threshold. UV is held
low for a time set by the external capacitor tied to the TIMER pin. The UV pin has a weak pull-up
to V
unconnected when not in use.
OV Latch Bypass-Input/Clear Pin. When pulled high, the OV output has the same delay and
output characteristics as the UV output. When pulled low, the OV output is latched when
asserted. (Applies only to the ADM12914-1).
OV and UV Disable Input. When pulled high, the OV and UV outputs are held high irrespective of
the state of the VHx and VLx input pins. However, if a UVLO condition occurs, the OV and UV
outputs assert. This pin has a weak internal pull-down (2 μA) to GND. Leave this pin unconnected
when not in use. (Applies only to the ADM12914-2).
Input Polarity Select. This three-state input pin allows the polarity of VH3, VL3, VH4, and VL4 to
be configured. Connect to V
configurations (see Table 5).
CC
and can be pulled up to 16 V externally via an external pull-up resistor. Leave this pin
Rev. PrA | Page 5 of 16
CC
, GND, or leave open to select one of three possible input polarity
Figure 3. ADM12914-2 Pin Configuration
VH1
VH2
VH3
VH4
VL1
VL2
VL3
VL4
CC
and can be pulled up to 16 V externally. Leave
1
2
3
4
5
6
7
8
ADM12914-2
(Not to Scale)
TOP VIEW
CC
CC
when not in use.
when not in use.
16
15
14
13
12
10
11
9
V
TIMER
SEL
DIS
UV
OV
REF
GND
CC
ADM12914