adm1185armz-1 Analog Devices, Inc., adm1185armz-1 Datasheet - Page 10

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adm1185armz-1

Manufacturer Part Number
adm1185armz-1
Description
Quad Voltage Monitor And Sequencer
Manufacturer
Analog Devices, Inc.
Datasheet

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ADM1185
VOLTAGE MONITORING AFTER POWER-ON
Once PWRGD is asserted, the logical core latches into a different
mode of operation. During the initial power-up phase, each
output directly depends on an input (for example, VIN3 asserting
causes OUT3 to assert). When power-up is complete, this
function is redundant.
Once in the PWRGD state, the following behavior can be observed:
Figure 20 and Figure 21 show waveforms that highlight the
behavior of the ADM1185 under various fault situations during
normal operation (that is, in the mode of operation after
PWRGD is asserted).
If the main 3.3 V supply monitored via VIN1 faults in the
power-good state, the PWRGD output is deasserted to
warn the downstream controller. All outputs (OUT1 to
OUT3) are immediately turned off, disabling all locally
generated supplies.
If a supply monitored by VIN2 to VIN4 fails, the PWRGD
output is deasserted to warn the controller, but the other
outputs are not deasserted.
Rev. A | Page 10 of 16
Figure 19. Flow Diagram Highlighting the Different Modes of Operation
VIN1 = FAULT
VIN1 = FAULT
VIN1 = FAULT
VIN1 = FAULT
STATE1
STATE2
STATE3
STATE4
STATE5
of the Logical Core
VIN1 = OK
(DELAY = 190ms TYP)
VIN2 = OK
VIN3 = OK
VIN4 = OK
(DELAY = 100ms MIN)
START
OUT1
ON
OUT1, OUT2
ON
OUT1, OUT2, OUT3
ON
PWRGD
VIN2. VIN3. VIN4 = FAULT

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