adm8513 Infineon Technologies Corporation, adm8513 Datasheet - Page 30

• Manufacturer Part Number: adm8513
• Description: Usb-to-10/100 Mbps Ethernet Lan Controller
• Manufacturer: Infineon Technologies Corporation

Table 65
Mode
Interrupt high,
self clearing
Interrupt low,
self clearing
Interrupt high,
mask clearing
Interrupt low,
mask clearing
Interrupt enable
register
latch_on_reset
Read/write
self clearing
Table 66
Clock Short Name
6.1.1
Ethernet Control 0
EC0
Ethernet Control 0
Field
TXE
RXE
RXFCE
WOE
RXSA
Data Sheet
Register Access Types (cont’d)
Registers Clock DomainsRegisters Clock Domains
System Registers
Bits
7
6
5
4
3
Symbol Description HW
ihsc
ilsc
ihmk
ilmk
ien
lor
rwsc
Differentiates the input signal (low-
>high) register cleared on read
Differentiates the input signal (high-
>low) register cleared on read
Differentiates the input signal (high-
>low) register cleared with written mask
Differentiates the input signal (low-
>high) register cleared with written
mask
Enables the interrupt source for
interrupt generation
rw register, value is latched after first
clock cycle after reset
Register is used as input for the hw, the
register will be cleared due to a HW
mechanism.
Type
rw
rw
rw
rw
rw
Description
Description
Ethernet Transmission Enable
Ethernet Receive Enable
Receive Pause Frame Enable
Wake-on-LAN Mode Enable
Status Append at the End of Received Packet Enable
Offset
00
30
H
Description SW
SW can read the register
SW can read the register
SW can read the register, with write mask
the register can be cleared
SW can read the register, with write mask
the register can be cleared
SW can read and write this register
Register is readable and writable by SW
Writing to the register generates a strobe
signal for the HW (1 pdi clock cycle)
Register is readable and writable by SW.
Registers Description
Rev. 1.21, 2005-12-05
Data Sheet
Reset Value
ADM8513
09
H