m66255fp Renesas Electronics Corporation., m66255fp Datasheet - Page 9

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m66255fp

Manufacturer Part Number
m66255fp
Description
8192 ? 10-bit Line Memory Fifo
Manufacturer
Renesas Electronics Corporation.
Datasheet

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M66255FP
Variable Length Delay Bits
1-line (8192 Bits) Delay
A write input data is written into memory at the second rise edge of WCK in the cycle, and a read output data is output
from memory at the first rise edge of RCK in the cycle, so that 1-line delay can be made easily.
N-bit Delay Bit
(Making a reset at a cycle corresponding to delay length)
REJ03F0249-0200 Rev.2.00 Sep 14, 2007
Page 9 of 13
WRES
RRES
WCK
RCK
Dn
Qn
WCK
RCK
WRES
RRES
Dn
Qn
t
RESS
t
RESS
t
RESH
Cycle 0
t
RESH
Cycle 0
t
DS
(0)
t
DS
t
DH
(0)
Cycle 1
t
DH
Cycle 1
(1)
(1)
Cycle 2
Cycle 2
8192 cycles
m cycles
(2)
(2)
(n − 3)
(8189)
Cycle n − 2 Cycle n − 1
Cycle 8190 Cycle 8191
(8190)
(n − 2)
t
RESS
(8191)
(n − 1)
Cycle 8192
t
t
RESH
AC
(0')
Cycle n
t
AC
(0')
t
DS
(0')
(0)
t
DS
t
t
Cycle 8193
DH
OH
(0')
(0)
t
t
Cycle n + 1
DH
OH
(1')
(1')
(1')
(1)
Cycle 8194
(1')
(1)
(2')
Cycle n + 2
(2')
(2')
(2)
WE, RE = "L"
(2')
(2)
WE, RE = "L"
m ≥ 3
Cycle n + 3
(3')
(3')
(3)
(3')
(3)

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