lan91c100fd Standard Microsystems Corp., lan91c100fd Datasheet - Page 26

• Manufacturer Part Number: lan91c100fd
• Description: Lan91c100fd Rev. B Feast Fast Ethernet Controller With Full Duplex Capability
• Manufacturer: Standard Microsystems Corp.

BANK 1
These registers are loaded starting at word location 20h of the EEPROM upon hardware reset or EEPROM reload. The
registers can be modified by the software driver, but a STORE operation will not modify the EEPROM Individual Address
contents. Bit 0 of Individual Address 0 register corresponds to the first bit of the address on the cable.
BANK 1
This register can be used as a way of storing and retrieving non-volatile information in the EEPROM to be used by the
software driver. The storage is word oriented, and the EEPROM word address to be read or written is specified using the
six lowest bits of the Pointer Register.
This register can also be used to sequentially program the Individual Address area of the EEPROM, that is normally
protected from accidental Store operations.
This register will be used for EEPROM read and write only when the EEPROM SELECT bit in the Control Register is set.
This allows generic EEPROM read and write routines that do not affect the basic setup of the LAN91C100FD.
SMSC DS – LAN91C100FD REV. B
4 THROUGH 9
OFFSET
BYTE
HIGH
BYTE
BYTE
HIGH
BYTE
BYTE
HIGH
BYTE
HIGH
BYTE
BYTE
OFFSET
LOW
LOW
LOW
LOW
A
0
0
0
0
0
0
0
0
INDIVIDUAL ADDRESS REGISTERS
GENERAL PURPOSE REGISTER
0
0
0
0
0
0
0
0
NAME
NAME
0
0
0
0
0
0
0
0
Page 26
HIGH DATA BYTE
LOW DATA BYTE
0
0
0
0
0
0
0
0
ADDRESS 0
ADDRESS 1
ADDRESS 2
ADDRESS 3
ADDRESS 4
ADDRESS 5
READ/WRITE
READ/WRITE
0
0
0
0
0
0
0
0
TYPE
TYPE
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
SYMBOL
SYMBOL
GPR
IAR
0
0
0
0
0
0
0
0
Rev. 03-28-07