mc33742 Freescale Semiconductor, Inc, mc33742 Datasheet - Page 39

• Manufacturer Part Number: mc33742
• Description: Mc33742 System Basis Chip Sbc With Enhanced High-speed Can Transceiver
• Manufacturer: Freescale Semiconductor, Inc

DETECTION PRINCIPLE
to GND, VDD, or VSUP, then voltage at the other line follows
the shorted line due to bus termination resistance and the
high impedance of the driver. For example, if CANL is shorted
to GND, CANL voltage is zero, and CANH voltage, as
measured by the Hg comparator, is also close to zero.
VSUP is possible. However, it is impossible to distinguish
which bus line, CANL or CANH, is shorted to GND or VSUP.
In the dominant state, the complete diagnostic is possible
once the driver is turned on.
CAN BUS FAILURE REPORTING
is reported in the SPI register TIM1/2. CANH bus line (for
example, CANH short to VSUP) is reported in the LPC
register.
indicate that a CAN bus failure has been detected.
NON-IDENTIFIED AND FULLY IDENTIFIED BUS
FAILURES
recessive state it is possible to detect an error condition;
however, is it not possible to fully identify the specific error.
This is called “non-identified” or “under-acquisition” bus
failure. If there is no communication (i.e., bus idle), it is still
possible to warn the MCU that the SBC has started to detect
a bus failure.
Analog Integrated Circuit Device Data
Freescale Semiconductor
RXD
Note RXD Flag is neither the RXPR bit in the LPC register nor the CAN-F bit in the INTR register.
TXD
In the recessive state, if one of the two bus lines is shorted
In the recessive state the failure detection to GND or
CANL bus line failures (for example, CANL short to GND)
In addition CAN-F and CAN-UF bits in the CAN register
As indicated in
2.0 V
V1
Diag
RXD Sense
Driver
RXD
Logic
Table
11, page 38, when the bus is in a
Diff
Figure 25. RXD Path and RXD Permanent Recessive Detection Principle
Driver
TXD
VDD
CANH
CANL
60 Ω
RXD Output
Prop Delay
Diff Output
RXD Flag
CANH
CANL
respectively) are used to signal bus failure. Bit D2 reports a
bus failure and bit D1 indicates if the failure is identified or not
(bit D1 is set to logic [1} if the error is not identified).
error will be detected and reported in the TIM1/2 and LPC
registers and bit D1 will be reset to logic [0].
NUMBER OF SAMPLES FOR PROPER FAILURE
DETECTION
recessive and dominant state to properly recognize the bus
failure. The error will be fully detected after five cycles of
recessive-dominant states. As long as the failure detection
circuitry has not detected the same error for five recessive-
dominant cycles, the bit “non-identified failure” (CAN-UF) will
be set.
RXD PERMANENT RECESSIVE FAILURE
an external hardware failure at the RXD output pin and to
ensure that a permanent failure at the RXD pin does not
disturb network communication.In the event RXD is shorted
to a permanent high level signal (i.e., 5.0 V), the CAN
protocol module within the MCU cannot receive any incoming
message. Additionally, the CAN protocol module cannot
distinguish the bus idle state and could start communication
at any time. To prevent this, an RXD failure detection, as
illustrated in
In the CAN register, bits D2 and D1 (CAN-F and CAN-UF,
When the detection mechanism is fully operating any bus
The failure detector requires at least one cycle of
The purpose of this detection mechanism is to diagnose
Sampling
Figure 25
RXD Short to V1
and explained below, is necessary.
FUNCTIONAL DEVICE OPERATION
Sampling
OPERATIONAL MODES
Sampling Sampling
RXD Flag Latched
33742
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