mc33291l Freescale Semiconductor, Inc, mc33291l Datasheet - Page 14

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mc33291l

Manufacturer Part Number
mc33291l
Description
Eight-output Switch With Serial Peripheral Interface I/o
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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SERIAL OUTPUT (SO)
the Shift register. The SO pin remains in a high impedance
state until the
reports the drain status, either high or low relative to the
previous command word. The SO pin changes state on the
rising edge of SCLK and reads out on the falling edge of
SCLK. When an output is OFF and not faulted, the
corresponding SO data-bit is a high state. When an output is
ON, and there is no fault, the corresponding data-bit on the
SO pin will be a low logic state. The SI/SO shifting of data
follows a first-in-first-out (FIFO) protocol with both input and
output words transferring the MSB first. Referring to
Figure
relative to the previous command word. The SO pin is not
affected by the status of the
RESET (RST)
clear the SPI Shift register. In doing so, all output switches
are set at OFF. With the device in a system with an MCU,
upon initial system power-up, the MCU holds the
the device in a logic low state, ensuring all outputs to be OFF
until both the VDD and VPWR pin voltages are adequate for
predictable operation. After the 33291L is reset, the MCU is
ready to assert system control with all output switches initially
OFF.
following normal operation, the MCU should pull the
low to shut down the outputs and clear the input data register.
The
incorporated to ensure operational predictability should the
external pull-down of the MCU open circuit. The internal pull-
down is only 25 µA, affording safe and easy interfacing to the
MCU. The
low state for a duration of at least 250 ns to ensure reliable a
reset.
14
33291L
FUNCTIONAL DESCRIPTION
FUNCTIONAL PIN DESCRIPTION
The serial output (SO) pin is the tri-stateable output from
The 33291L Reset (
If the VPWR pin of the 33291L experiences a low voltage,
RST
17, the DO bit is the MSB corresponding to Output 7
pin is active low and has an internal pull-down
RST
CS
pin of the 33291L should be pulled to a logic
pin goes to a logic low state. The SO data
RST
) pin is active low. It is used to
RST
pin.
RST
RST
pin of
pin
programmed through the use of an RC network comprised of
a shunt capacitor from the
to V
ensuring proper discharge of the capacitor. Careful attention
eliminates adverse delay of the
if it pulls the Reset line low, thereby accomplishing
initialization for turn ON delay. It may be easier to incorporate
delay into the software program and use a parallel port pin of
the MCU to control the 33291L
SHORT FAULT PROTECT DISABLE (SFPD)
prevent the outputs from latching-off due to an overcurrent
condition. This feature provides control of incandescent lamp
loads where in-rush currents exceed the device’s analog
current limits. Essentially the SFPD pin determines whether
the 33291L output(s) will instantly shut down upon sensing an
output short or remain ON in a current limiting mode of
operation until the output short is removed or thermal
shutdown is reached. If the SFPD pin is tied to V
the 33291L output(s) will remain ON in a current limited mode
of operation upon encountering a load short to supply or
overcurrent condition. When the SFPD pin is grounded, a
short circuit will immediately shut down only the output
affected. Other outputs not having a fault condition will
operate normally. The short circuit operation is addressed in
more detail later.
A simple power ON reset delay of the system can be
The Short Fault Protect Disable (SFPD) pin is used to
DD
, illustrated in
MCU
Figure 16. Power ON Reset
Reset
Figure
Analog Integrated Circuit Device Data
RST
V
16. Care should be exercised
DD
RST
RST
RDLY
C
pin to Ground and a resistor
DLY
Freescale Semiconductor
and damage of the MCU
pin.
+
33291
Reset
DD
20 µA
= 5.0 V

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