ucb1300 NXP Semiconductors, ucb1300 Datasheet - Page 23

• Manufacturer Part Number: ucb1300
• Description: Advanced Modem/audio Analog Front-end
• Manufacturer: NXP Semiconductors

Philips Semiconductors
The second ADC start mode gives the opportunity to start the ADC at the rising edge of the signal connected to the
ADCSYNC pin. The 0-to-1 transition of the ADC_START bit will arm the ADC, such that it will start in the first detected
rising edge of the ADCSYNC signal. Also in this mode, the internal start/stop logic will detect whether the ADC multiplexer
settings are changed simultaneously with the ADC start bit and it will add a delay to ensure sufficient setting time for the
internal track and hold circuit. A rising edge of the signal connected to the ADCSYNC pin occurring during this tracking
time is ignored; the ADC conversion is started on the first rising edge detected after this delay time. This leads to the
following two timing diagrams of the ADC conversion.
2000 Jun 26
adc_input_selection
Advanced modem/audio analog front-end
adc_start (internal)
adc_ena (internal)
‘adc start state’
adc_dat_valid
‘SIB frame’
‘adc state’
adc_data
adc_sync
Fig.17 ADC timing sequence, ADC sync mode, no changing ADC input multiplexer settings.
tsibwrite
set adc_ena:1
thadcsync
wait for start
tadcena
tracking
tsibwrite
set adc_start:1
wait for sync
23
tsibwrite
set adc_start:0
tadcsam3
tadcconv
conversion
read reg:11
wait for start
Product specification
tracking
UCB1300