adau1373 Analog Devices, Inc., adau1373 Datasheet - Page 23

• Manufacturer Part Number: adau1373
• Description: Low Power Codec With Speaker And Headphone Amplifier Adau1373
• Manufacturer: Analog Devices, Inc.

Pin
No.
C1
C2
C3
C4
C5
C6
C7
C8
C9
D1
D2
D3
D4
D5
D6
D7
D8
D9
E1
E2
E3
E4
E5
E6
E7
E8
E9
F1
F2
F3
F4
F5
F6
F7, F8
F9
G1, G2
G3
G4
G5
G6
G7
G8
G9
Mnemonic
IOVDD1
MCLK1
SDA
GPIO4
SCL
DMIC3_4_DATA
LOUT1L/LOUTLP
MICBIAS1
MICBIAS2
MCLK2
BCLKA
LRCLKA
SDATAOUTA
SDATAINA
GPIO1
LOUT1R/LOUTRP
LOUT2L/LOUTLN
LOUT2R/LOUTRN
IOVDD3
LRCLKB
SDATAOUTB
BCLKB
DGND
GPIO2
LN1FBIN
LN2FBIN
AVDD
LRCLKC
BCLKC
SDATAINC
IOVDD2
GPIO3
SDATAINB
AGND
RESERVED
SPKVDD
SDATAOUTC
RESERVED
JACKDET
SD
SGND
HPL
HPR
Type
PWR
D_IN
D_I/O
D_I/O
D_IN
D_IN
A_OUT
A_OUT
A_OUT
D_IN
D_I/O
D_I/O
D_OUT
D_IN
D_I/O
A_OUT
A_OUT
A_OUT
PWR
D_I/O
D_OUT
D_I/O
PWR
D_I/O
A_IN
A_IN
PWR
D_I/O
D_I/O
D_IN
PWR
D_I/O
D_IN
PWR
A_IN
PWR
D_OUT
D_IN
D_IN
D_IN
A_IN
A_OUT
A_OUT
Description
Supply for Digital Audio Input/Output Interface A. Set IOVDD1 between 1.8 V and 3.3 V. Decouple this
pin to DGND with a 100 nF capacitor.
External Master Clock Input 1 (8 kHz to 27 MHz).
Serial Data for I
General-Purpose Input/Output 4.
Serial Clock for I
Serial Data Input Digital Microphone 3 and Serial Data Input Digital Microphone 4.
Left Channel Line Output 1, Single-Ended Mode (LOUT1L)/Noninverting Left Channel Line Output,
Differential Mode (LOUTLP).
Bias Voltage for Electret Microphone 1.
Bias Voltage for Electret Microphone 2.
External Master Clock Input 2 (8 kHz to 27 MHz).
Serial Bit Clock, Digital Audio Interface A.
Frame Clock, Digital Audio Interface A.
Serial Data Output, Digital Audio Interface A.
Serial Data Input, Digital Audio Interface A.
General-Purpose Input/Output 1.
Right Channel Line Output 1, Single-Ended Mode (LOUT1R)/Noninverting Right Channel Line
Output, Differential Mode (LOUTRP).
Left Channel Line Output 2, Single-Ended Mode (LOUT2L)/Inverting Left Channel Line Output,
Differential Mode (LOUTLN).
Right Channel Line Output 2, Single-Ended Mode (LOUT2R)/Inverting Right Channel Line Output,
Differential Mode (LOUTRN).
Supply for Digital Audio Input/Output Interface C. Set IOVDD3 between 1.8 V and 3.3 V and
decouple to DGND with a 100 nF capacitor.
Frame Clock, Digital Audio Interface B.
Serial Data Output, Digital Audio Interface B.
Serial Bit Clock, Digital Audio Interface B.
Digital Ground. The AGND and DGND pins must be tied directly together in a common ground plane.
General-Purpose Input/Output 2.
Line Output Amplifier 1 Feedback. This pin can be used to sense the ground noise at the line output
jack; use a 2.2 μF capacitor to connect this pin to AGND at the line output jack.
Line Output Amplifier 2 Feedback. This pin can be used to sense the ground noise at the line output
jack; use a 2.2 μF capacitor to connect this pin to AGND at the line output jack.
1.5 V to 1.8 V Analog Supply for DAC and Microphone Bias. Decouple this pin to AGND with a 100 nF
capacitor in parallel with a 10 μF capacitor.
Frame Clock, Digital Audio Interface C.
Serial Bit Clock, Digital Audio Interface C.
Serial Data Input, Digital Audio Interface C.
Supply for Digital Audio Input/Output Interface B. Set IOVDD2 between 1.8 V and 3.3 V and
decouple to DGND with a 100 nF capacitor.
General-Purpose Input/Output 3.
Serial Data Input, Digital Audio Interface B.
Analog Ground.
Reserved for Internal Use. Do not connect.
Supply for Speaker Class-D Amplifier.
Serial Data Output, Digital Audio Interface C.
Reserved. Connect to DGND.
TLL-Compatible Logic Input. Detects insertion/removal of headphone plug.
Shutdown Control. Set high for normal operation; set low for full chip power-down.
Headphone Signal Return Sense. Connect directly to headphone socket ground for lowest dc offset.
Left Headphone Output.
Right Headphone Output.
2
C. This pin is a bidirectional open drain and must be pulled up to IOVDD5 with a resistor.
2
C Port. This pin is input only and must be pulled up to IOVDD5 with a resistor.
Rev. 0 | Page 23 of 296
ADAU1373