km68v1000blg-7l Samsung Semiconductor, Inc., km68v1000blg-7l Datasheet - Page 2

• Manufacturer Part Number: km68v1000blg-7l
• Description: 128k X 8bit Low Power And Low Voltage Cmos Statinc Ram
• Manufacturer: Samsung Semiconductor, Inc.

VSS
I/O1
I/O2
I/O3
A16
A14
A12
N.C
128K x8 bit Low Power and Low Voltage CMOS Static RAM
PRODUCT FAMILY
1. The parameter is measured with 30pF test load.
FEATURES
PIN DESCRIPTION
A7
A6
A5
A4
A3
A2
A1
A0
KM68V1000B, KM68U1000B Family
KM68V1000BL/L-L
KM68U1000BL/L-L
KM68V1000BLE/LE-L
KM68U1000BLE/LE-L
KM68V1000BLI/LI-L
KM68U1000BLI/LI-L
Process Technology : Poly Load
Organization : 128Kx8
Power Supply Voltage :
Low Data Retention Voltage : 2V(Min)
Three state output and TTL Compatible
Package Type : 32-SOP, 32-TSOP1-0820F/R
SAMSUNG ELECTRONICS CO., LTD. reserves the right to change products and specifications without notice.
Product Family
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
KM68V1000B family : 3.0~3.6V
KM68U1000B family : 2.7~3.3V
32-SOP
I/O
CS
A
Name
0
Vcc
Vss
N.C
WE
OE
1
1
~A
~I/O
,CS
16
2
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
8
VCC
A15
CS2
WE
A13
A8
A9
A11
OE
A10
CS1
I/O8
I/O7
I/O6
I/O5
I/O4
VCC
VCC
CS2
CS2
A14
A13
A11
A13
A15
A14
A12
A12
A16
A15
A11
A16
WE
WE
NC
NC
A9
A7
A4
A5
A6
A7
A9
A8
A6
A5
A4
A8
Operating Temperature
Chip Select Inputs
Output Enable Input
Write Enable Input
Address Inputs
Data Inputs/Outputs
Power
Ground
No Connection
Commercial(0~70 C)
Extended(-25~85 C)
Industrial(-40~85 C)
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Type 1 - Reverse
Type 1 - Forward
Function
32-TSOP
32-TSOP
Vcc Range
3.0~3.6V
2.7~3.3V
3.0~3.6V
2.7~3.3V
3.0~3.6V
2.7~3.3V
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
OE
A10
CS1
I/O8
I/O7
I/O6
I/O5
I/O4
VSS
I/O3
I/O2
I/O1
A0
A1
A2
A3
A3
A2
A1
A0
I/O1
I/O2
I/O3
VSS
I/O4
I/O5
I/O6
I/O7
I/O8
CS1
A10
OE
FUNCTIONAL BLOCK DIAGRAM
GENERAL DESCRIPTION
The KM68V1000B and KM68U1000B families are fabricated
by SAMSUNG s advanced CMOS process technology. The
families support various operating temperature ranges and
have various package types for user flexibility of system
design. The families also support low data retention voltage for
battery back-up operation with low data retention current.
CS1
CS2
Speed(ns)
WE
OE
70
70
70
100
100
100
1)
1)
1)
/100
/100
/100
Control
Logic
I/O
I/O
1
8
A4
A5
A6
A7
A12
A13
A14
A15
A16
(I
100/20 A
100/20 A
Standby
50/15 A
50/15 A
50/15 A
50/15 A
SB1
Power Dissipation
, Max)
Clk gen.
Data
cont
Data
cont
Row
select
(I
Operating
CC2
40mA
A0 A1 A2 A3 A8
, Max)
CMOS SRAM
Precharge circuit.
Memory array
512 rows
256 8 columns
Column select
I/O Circuit
32-SOP
32-TSOP1- R/F
PKG Type
A9
Revision 2.0
March 1998
A10
A11