mpc2605 Micro Electronics Corporation, mpc2605 Datasheet - Page 17
mpc2605
Manufacturer Part Number
mpc2605
Description
Integrated Secondary Cache Powerpc Microprocessors
Manufacturer
Micro Electronics Corporation
Datasheet
1.MPC2605.pdf
(30 pages)
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READ MISS (NORMAL BUS MODE)
read miss followed by a read hit.
3–1–1–1 response from memory. AACK for the second
access is not driven true until the cycle after the fourth TA of
MOTOROLA
DH0 – DH31,
DL0 – DL31
CPU DBG
L2 CLAIM
Figure 3 is an illustration of MPC2605 pipeline depth with a
For illustration purposes the read miss is shown as a
A0 – A31
CPU BG
AACK
TBST
CLK
DBB
TS
TA
LEGEND
Signal driven to the MPC2605
Signal driven by the MPC2605
High–Z
Figure 3. Read Miss Followed by a Burst Read Hit for MPC603/604
1
2
A
A1
3
4
A2
the read miss. This is because the MPC2605 is not in control
of TA for the first access and must, therefore, wait until the
first access’ data tenure is complete before it can drive AACK
true for the read hit.
5
A3
6
A4
B
7
B1
8
B2
9
10
B3
11
B4
MPC2605
12
17